component
AD5541ARZ-REEL7
Public Made by Adomby adom
Analog Devices Digital To Analog Converters (DAC), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAD5541ARZ-REEL7
Analog Devices · Digital To Analog Converters (DAC) · SOIC-8
AD5541ARZ-REEL7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | output | Analog output voltage from the DAC; in unipolar operation the output range is 0 V to VREF − 1 LSB, and the unbuffered output can drive 60 kΩ loads directly. |
| 2 | AGND | power_in | Ground reference point for the analog circuitry, specified at 0 V with DGND. |
| 3 | REF | input | Voltage reference input for the DAC; connect to an external 2.5 V reference, which can range from 2 V to VDD. |
| 4 | CS | input | Logic input chip select that frames the serial data input. |
| 5 | SCLK | input | Serial clock input; data is clocked into the input register on the rising edge of SCLK, and the duty cycle must be between 40% and 60%. |
| 6 | DIN | input | Serial data input that accepts 16-bit words, clocked into the input register on the rising edge of SCLK. |
| 7 | DGND | power_in | Digital ground reference for the digital circuitry, specified at 0 V with AGND. |
| 8 | VDD | power_in | Analog supply voltage stated as 5 V ± 10% in the pin table, within the 2.7 V to 5.5 V single-supply operating range given in the specifications. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Data Acquisition |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Relative Accuracy (INL), A grade | INL | -4 | 0.5 | 4 | LSB | A grade | 3 |
| Differential Nonlinearity (DNL) | DNL | -1 | 0.5 | 1 | LSB | Guaranteed monotonic | 3 |
| Gain Error | -2 | 0.5 | 2 | LSB | TA = 25°C | 3 | |
| Gain Error | -3 | 3 | LSB | 3 | |||
| Gain Error Temperature Coefficient | -0.1 | 0.1 | ppm/°C | 3 | |||
| Unipolar Zero Code Error | -0.7 | 0.3 | 0.7 | LSB | TA = 25°C | 3 | |
| Unipolar Zero Code Error | -1.5 | 1.5 | LSB | 3 | |||
| Unipolar Zero Code Temperature Coefficient | -0.05 | 0.05 | ppm/°C | 3 | |||
| Output Voltage Range | 0 | V | Unipolar operation | 3 | |||
| Power Supply Rejection Ratio | -1 | 1 | LSB | ΔVDD ± 10% | 3 | ||
| Reference Input Range | 2 | V | 3 | ||||
| Input Current | -1 | 1 | μA | 3 | |||
| Input Low Voltage | VINL | 0.8 | V | 3 | |||
| Input High Voltage | VINH | 2.4 | V | 3 | |||
| VDD Supply Voltage | VDD | 2.7 | 5.5 | V | 4 | ||
| Supply Current | IDD | 125 | 150 | μA | Digital inputs at rails | 4 | |
| Power Dissipation | 0.625 | 0.825 | mW | Digital inputs at rails | 4 | ||
| SCLK Cycle Frequency | fSCLK | 25 | MHz | 4 | |||
| SCLK Cycle Time | t1 | 40 | ns | 4 | |||
| SCLK High Time | t2 | 20 | ns | 4 | |||
| SCLK Low Time | t3 | 20 | ns | 4 | |||
| CS Low to SCLK High Setup | t4 | 10 | ns | 4 | |||
| CS High to SCLK High Setup | t5 | 15 | ns | 4 | |||
| SCLK High to CS Low Hold Time | t6 | 30 | ns | 4 | |||
| SCLK High to CS High Hold Time | t7 | 20 | ns | 4 | |||
| Data Setup Time | t8 | 15 | ns | 4 | |||
| Data Hold Time | t9 | 4 | ns | VINH = 90% of VDD, VINL = 10% of VDD | 4 | ||
| Data Hold Time | t9 | 7.5 | ns | VINH = 3 V, VINL = 0 V | 4 | ||
| CS High Time Between Active Periods | t12 | 30 | ns | 4 | |||
| VDD to AGND | -0.3 | 6 | V | 5 | |||
| Digital Input Voltage to DGND | -0.3 | V | 5 | ||||
| VOUT to AGND | VOUT | -0.3 | V | 5 | |||
| AGND to DGND | -0.3 | 0.3 | V | 5 | |||
| Input Current to Any Pin Except Supplies | -10 | 10 | mA | 5 | |||
| Operating Temperature Range, Industrial | -40 | 85 | °C | A, B, C versions | 5 | ||
| Storage Temperature Range | -65 | 150 | °C | 5 | |||
| Maximum Junction Temperature (TJ max) | TJ max | 150 | °C | 5 | |||
| Lead Temperature, Soldering Peak Temperature | 260 | °C | As per JEDEC Standard 20 | 5 | |||
| ESD (HBM) | 5 | kV | HBM classification | 5 | |||
| Thermal Impedance, junction-to-ambient | θJA | 149.5 | °C/W | SOIC (R-8) | 5 | ||
| Reference Voltage (VREF) Operating Range | VREF | 2.5 | V | 2.5 V ≤ VREF ≤ VDD | 3 |
CAD (KiCad official)
- Symbol:
AD5541ARZ-REEL7 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ad5541arz-reel7-etched.step/ad5541arz-reel7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ad5541arz-reel7.step/ad5541arz-reel7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (20 pp, sha256
6a9cdf0db0bc1b51, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).