component
W25R128JVSIQ
Public Made by Adomby adom
Winbond Elec NOR FLASH, SOIC-8-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownW25R128JVSIQ
Winbond Elec · NOR FLASH · SOIC-8-208mil
W25R128JVSIQ from Winbond Elec, in a SOIC-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | /CS | input | Chip Select Input: when high the device is deselected and the serial data outputs are high impedance, and /CS must track the VCC supply level at power-up and power-down. |
| 2 | IO1 | bidirectional | Data Input Output 1, used for Standard and Dual SPI instructions (DO in Standard SPI). |
| 3 | IO2 | bidirectional | Data Input Output 2, used for Quad SPI instructions only. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | IO0 | bidirectional | Data Input Output 0, used for Standard and Dual SPI instructions (DI in Standard SPI). |
| 6 | CLK | input | Serial Clock Input providing the timing for serial input and output operations; SPI clock up to 133MHz is supported. |
| 7 | IO3 | bidirectional | Data Input Output 3, used for Quad SPI instructions only. |
| 8 | VCC | power_in | Power Supply, specified for a single 2.7V to 3.6V supply. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Winbond Elec |
| Package | SOIC-8-208mil |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | -0.6 | V | 65 | |||
| Voltage Applied to Any Pin | VIO | -0.6 | V | Relative to Ground | 65 | ||
| Transient Voltage on any Pin | VIOT | -2 | V | <20nS Transient, Relative to Ground | 65 | ||
| Storage Temperature | TSTG | -65 | 150 | °C | 65 | ||
| Electrostatic Discharge Voltage | VESD | -2000 | 2000 | V | Human Body Model | 65 | |
| Supply Voltage | VCC | 3 | 3.6 | V | FR = 133MHz, fR = 50MHz | 65 | |
| Supply Voltage | VCC | 2.7 | 3 | V | FR = 104MHz, fR = 50MHz | 65 | |
| Supply Voltage | VCC | 2.7 | 3.6 | V | FR = 80MHz, RPMC Counters | 65 | |
| Ambient Temperature, Operating | TA | -40 | 85 | °C | Industrial | 65 | |
| VCC (min) to /CS Low | tVSL | 20 | µs | 66 | |||
| Time Delay Before Write Instruction | tPUW | 5 | ms | 66 | |||
| Write Inhibit Threshold Voltage | VWI | 1 | 2 | V | 66 | ||
| Input Capacitance | CIN | 12 | pF | VIN = 0V | 67 | ||
| Output Capacitance | COUT | 16 | pF | VOUT = 0V | 67 | ||
| Input Leakage | ILI | -4 | 4 | µA | 67 | ||
| I/O Leakage | ILO | -4 | 4 | µA | 67 | ||
| Standby Current | ICC1 | 35 | 100 | µA | /CS = VCC, VIN = GND or VCC | 67 | |
| Power-down Current | ICC2 | 2 | 25 | µA | /CS = VCC, VIN = GND or VCC | 67 | |
| Current Read Data / Dual /Quad 50MHz | ICC3 | 15 | mA | C = 0.1 VCC / 0.9 VCC, DO = Open | 67 | ||
| Current Read Data / Dual /Quad 80MHz | ICC3 | 18 | mA | C = 0.1 VCC / 0.9 VCC, DO = Open | 67 | ||
| Current Read Data / Dual Output Read/Quad Output Read 104MHz | ICC3 | 20 | mA | C = 0.1 VCC / 0.9 VCC, DO = Open | 67 | ||
| Current Write Status Register | ICC4 | 20 | 25 | mA | /CS = VCC | 67 | |
| Current Page Program | ICC5 | 20 | 25 | mA | /CS = VCC | 67 | |
| Current Sector/Block Erase | ICC6 | 20 | 25 | mA | /CS = VCC | 67 | |
| Current Chip Erase | ICC7 | 20 | 25 | mA | /CS = VCC | 67 | |
| RPMC OP1 Write Only | ICC8 | 15 | 20 | mA | /CS = VCC | 67 | |
| RPMC OP1 & Array Read | ICC9 | 19 | 40 | mA | C = 0.1 VCC / 0.9 VCC, DO = Open | 67 | |
| RPMC OP1 & Array Program/Erase | ICC10 | 35 | 45 | mA | /CS = VCC | 67 | |
| RPMC OP2 Read Only | ICC11 | 30 | mA | C = 0.1 VCC / 0.9 VCC | 67 | ||
| RPMC OP2 & Array Program/Erase | ICC12 | 30 | 45 | mA | C = 0.1 VCC / 0.9 VCC | 67 | |
| Output Low Voltage | VOL | 0.2 | V | IOL = 100 µA | 67 | ||
| Clock frequency for Read Data instruction (03h) | fR | 50 | MHz | 69 | |||
| Clock frequency for all other SPI instructions | FR | 104 | MHz | 2.7V-3.0V | 69 | ||
| Clock frequency for all other SPI instructions | FR | 133 | MHz | 3.0V-3.6V | 69 | ||
| Clock frequency for RPMC instructions | FR | 80 | MHz | 69 | |||
| Clock High, Low Time for all SPI instructions except Read Data (03h) | tCLH, tCLL | 3.4 | ns | 69 | |||
| Clock High, Low Time for all RPMC instructions | tCLH, tCLL | 5 | ns | 69 | |||
| Clock High, Low Time for Read Data (03h) instruction | tCRLH, tCRLL | 8 | ns | 69 | |||
| /CS Active Setup Time relative to CLK | tSLCH | 5 | ns | 69 | |||
| /CS Not Active Hold Time relative to CLK | tCHSL | 5 | ns | 69 | |||
| Data In Setup Time | tDVCH | 2 | ns | 69 | |||
| Data In Hold Time | tCHDX1 | 3 | ns | 69 | |||
| /CS Deselect Time for Memory Array Read | tSHSL1 | 10 | ns | 69 | |||
| /CS Deselect Time for Erase or Program, Read Status Registers or RPMC operation | tSHSL2 | 50 | ns | 69 | |||
| Output Disable Time | tSHQZ | 7 | ns | 69 | |||
| Clock Low to Output Valid | tCLQV1 | 7 | ns | 2.7V-3.0V | 69 | ||
| Clock Low to Output Valid | tCLQV1 | 6 | ns | 3.0V-3.6V | 69 | ||
| Clock Low to Output Valid (Non-array Read & RPMC OP2) | tCLQV2 | 8.5 | ns | 2.7V-3.0V | 69 | ||
| Clock Low to Output Valid (Non-array Read & RPMC OP2) | tCLQV2 | 7.5 | ns | 3.0V-3.6V | 69 | ||
| Output Hold Time | tCLQX | 2 | ns | 69 | |||
| /CS High to Power-down Mode | tDP | 3 | µs | 70 | |||
| /CS High to Standby Mode without ID Read | tRES1 | 3 | µs | 70 | |||
| /CS High to Standby Mode with ID Read | tRES2 | 1.8 | µs | 70 | |||
| /CS High to next Instruction after Suspend | tSUS | 20 | µs | 70 | |||
| Write Status Register Time | tW | 10 | 15 | ms | 70 | ||
| Page Program Time | tPP | 0.7 | 3 | ms | 70 | ||
| Sector Erase Time (4KB) | tSE | 45 | 400 | ms | 70 | ||
| Block Erase Time (32KB) | tBE1 | 120 | 1600 | ms | 70 | ||
| Block Erase Time (64KB) | tBE2 | 150 | 2000 | ms | 70 | ||
| Chip Erase Time | tCE | 40 | 200 | s | 70 |
CAD (KiCad official)
- Symbol:
W25R128JVSIQ - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8-208mil (KiCad packages3D, STEP)
- 3D model files:
w25r128jvsiq-etched.step/w25r128jvsiq-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);w25r128jvsiq.step/w25r128jvsiq.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Winbond Elec datasheet (77 pp, sha256
e73054a9e75feb1f, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).