component
TL431ACDG
Public Made by Adomby adom
onsemi Voltage Reference, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTL431ACDG
onsemi · Voltage Reference · SOIC-8
TL431ACDG from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Cathode | passive | Cathode of the shunt regulator, operating at 1.0 mA to 100 mA sink current with VKA from Vref up to 36 V. |
| 2 | Anode | power_in | Anode (ground side) of the shunt regulator, electrically common to the die attach flag with pins 3, 6 and 7. |
| 3 | Anode | power_in | Anode (ground side) of the shunt regulator, electrically common to the die attach flag with pins 2, 6 and 7. |
| 4 | N/C | unconnected | No connection. |
| 5 | N/C | unconnected | No connection. |
| 6 | Anode | power_in | Anode (ground side) of the shunt regulator, electrically common to the die attach flag with pins 2, 3 and 7. |
| 7 | Anode | power_in | Anode (ground side) of the shunt regulator, electrically common to the die attach flag with pins 2, 3 and 6. |
| 8 | Reference | input | Reference input of the programmable shunt regulator, set by two external resistors to program the output from Vref to 36 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reference Input Voltage, TA = 25°C | Vref | 2.47 | 2.495 | 2.52 | V | VKA = Vref, IK = 10 mA, TA = 25°C | 4 |
| Reference Input Voltage over temperature range | Vref | 2.453 | 2.537 | V | VKA = Vref, IK = 10 mA, TA = Tlow to Thigh (Note 6: 0°C to +70°C for TL431AC) | 4 | |
| Reference Input Voltage Deviation Over Temperature Range | Vref | 3 | 17 | mV | VKA = Vref, IK = 10 mA | 4 | |
| Ratio of Change in Reference Input Voltage to Change in Cathode to Anode Voltage (VKA = 10 V to Vref) | ΔVref/ΔVKA | -1.4 | -2.7 | mV/V | IK = 10 mA, VKA = 10 V to Vref | 4 | |
| Ratio of Change in Reference Input Voltage to Change in Cathode to Anode Voltage (VKA = 36 V to 10 V) | ΔVref/ΔVKA | -1 | -2 | mV/V | IK = 10 mA, VKA = 36 V to 10 V | 4 | |
| Reference Input Current, TA = 25°C | Iref | 1.8 | 4 | µA | IK = 10 mA, R1 = 10 kΩ, R2 = ∞, TA = 25°C | 4 | |
| Reference Input Current over temperature range | Iref | 5.2 | µA | IK = 10 mA, R1 = 10 kΩ, R2 = ∞, TA = Tlow to Thigh (Note 6) | 4 | ||
| Reference Input Current Deviation Over Temperature Range | Iref | 0.4 | 1.2 | µA | IK = 10 mA, R1 = 10 kΩ, R2 = ∞ | 4 | |
| Minimum Cathode Current For Regulation | Imin | 0.5 | 1 | mA | VKA = Vref | 4 | |
| Off-State Cathode Current | Ioff | 20 | 1000 | nA | VKA = 36 V, Vref = 0 V | 4 | |
| Dynamic Impedance | /ZKA/ | 0.22 | 0.5 | Ω | VKA = Vref, IK = 1.0 mA to 100 mA, f ≤ 1.0 kHz | 4 | |
| Cathode to Anode Voltage (recommended) | VKA | 36 | V | Minimum is Vref (not a numeric value in the table) | 2 | ||
| Cathode Current (recommended) | IK | 1 | 100 | mA | 2 | ||
| Cathode to Anode Voltage (absolute maximum) | VKA | 37 | V | 2 | |||
| Cathode Current Range, Continuous | IK | -100 | 150 | mA | Continuous | 2 | |
| Reference Input Current Range, Continuous | Iref | -0.05 | 10 | mA | Continuous | 2 | |
| Operating Junction Temperature | TJ | 150 | °C | 2 | |||
| Operating Ambient Temperature Range (TL431AC) | TA | 0 | 70 | °C | TL431AC (commercial grade) | 2 | |
| Storage Temperature Range | Tstg | -65 | 150 | °C | 2 | ||
| ESD Rating, Human Body Model | HBM | 2000 | V | Per JEDEC JESD22-A114F; printed as >2000 | 2 | ||
| ESD Rating, Machine Model | MM | 200 | V | Per JEDEC JESD22-A115C; printed as >200 | 2 | ||
| ESD Rating, Charged Device Model | CDM | 500 | V | Per JEDEC JESD22-C101E; printed as >500 | 2 | ||
| Thermal Resistance, Junction-to-Ambient (D suffix SOIC-8) | RθJA | 178 | °C/W | D, LP Suffix Package | 3 | ||
| Thermal Resistance, Junction-to-Case (D suffix SOIC-8) | RθJC | 83 | °C/W | D, LP Suffix Package | 3 |
CAD (KiCad official)
- Symbol:
TL431ACDG - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tl431acdg-etched.step/tl431acdg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tl431acdg.step/tl431acdg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (22 pp, sha256
c82bb95655b732ca, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).