Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

STM32F070RBT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32F070RBT6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Digital power supply for the I/Os and core, VDD = 2.4 V to 3.6 V per the device features.
2 PC13 bidirectional Standard 3.3 V I/O powered through the RTC power switch, which sinks at most 3 mA, so output speed must not exceed 2 MHz at 30 pF and the pin must not act as a current source such as an LED driver; also WKUP2, RTC_TAMP1, RTC_TS and RTC_OUT.
3 PC14-OSC32_IN bidirectional Standard 3.3 V I/O on the RTC power switch with the same 2 MHz / 30 pF output and 3 mA limits; additional function OSC32_IN (32 kHz oscillator input).
4 PC15-OSC32_OUT (PC15) bidirectional Standard 3.3 V I/O on the RTC power switch with the same 2 MHz / 30 pF output and 3 mA limits; additional function OSC32_OUT (32 kHz oscillator output).
5 PF0-OSC_IN bidirectional 5 V tolerant FT I/O used as the OSC_IN oscillator input; its I2C1_SDA alternate function exists only on STM32F070C6/F6 devices, not on this RB variant.
6 PF1-OSC_OUT bidirectional 5 V tolerant FT I/O used as the OSC_OUT oscillator output; its I2C1_SCL alternate function exists only on STM32F070C6/F6 devices, not on this RB variant.
7 NRST bidirectional Active-low bidirectional device reset input and internal reset output with an embedded weak pull-up resistor.
8 PC0 bidirectional 3.3 V tolerant TTa I/O connected directly to the ADC, also ADC_IN10 and EVENTOUT.
9 PC1 bidirectional 3.3 V tolerant TTa I/O connected directly to the ADC, also ADC_IN11 and EVENTOUT.
10 PC2 bidirectional 3.3 V tolerant TTa I/O connected directly to the ADC, also ADC_IN12, SPI2_MISO and EVENTOUT.
11 PC3 bidirectional 3.3 V tolerant TTa I/O connected directly to the ADC, also ADC_IN13, SPI2_MOSI and EVENTOUT.
12 VSSA power_in Analog ground.
13 VDDA power_in Analog power supply, VDDA = VDD to 3.6 V per the device features.
14 PA0 bidirectional 3.3 V tolerant TTa I/O connected to the ADC; also USART2_CTS, USART4_TX, RTC_TAMP2, WKUP1 and ADC_IN0.
15 PA1 bidirectional 3.3 V tolerant TTa I/O connected to the ADC; also USART2_RTS, TIM15_CH1N, USART4_RX, EVENTOUT and ADC_IN1.
16 PA2 bidirectional 3.3 V tolerant TTa I/O connected to the ADC; also USART2_TX, TIM15_CH1, WKUP4 and ADC_IN2.
17 PA3 bidirectional 3.3 V tolerant TTa I/O connected to the ADC; also USART2_RX, TIM15_CH2 and ADC_IN3.
18 VSS power_in Ground.
19 VDD power_in Digital power supply, VDD = 2.4 V to 3.6 V per the device features.
20 PA4 bidirectional 3.3 V tolerant TTa I/O connected to the ADC; also SPI1_NSS, TIM14_CH1, USART2_CK, ADC_IN4, and USB_NOE which exists only on STM32F070C6/F6 devices.
21 PA5 bidirectional 3.3 V tolerant TTa I/O connected to the ADC; also SPI1_SCK and ADC_IN5.
22 PA6 bidirectional 3.3 V tolerant TTa I/O connected to the ADC; also SPI1_MISO, TIM3_CH1, TIM1_BKIN, TIM16_CH1, EVENTOUT, USART3_CTS and ADC_IN6.
23 PA7 bidirectional 3.3 V tolerant TTa I/O connected to the ADC; also SPI1_MOSI, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1, EVENTOUT and ADC_IN7.
24 PC4 bidirectional 3.3 V tolerant TTa I/O connected to the ADC; also EVENTOUT, USART3_TX and ADC_IN14.
25 PC5 bidirectional 3.3 V tolerant TTa I/O connected to the ADC; also USART3_RX, ADC_IN15 and WKUP5.
26 PB0 bidirectional 3.3 V tolerant TTa I/O connected to the ADC; also TIM3_CH3, TIM1_CH2N, EVENTOUT, USART3_CK and ADC_IN8.
27 PB1 bidirectional 3.3 V tolerant TTa I/O connected to the ADC; also TIM3_CH4, USART3_RTS, TIM14_CH1, TIM1_CH3N and ADC_IN9.
28 PB2 bidirectional 5 V tolerant FT I/O with no alternate functions listed in the pin definition or the port B alternate-function table.
29 PB10 bidirectional 5 V tolerant FT I/O; also SPI2_SCK and USART3_TX.
30 PB11 bidirectional 5 V tolerant FT I/O; also USART3_RX, EVENTOUT and I2C2_SDA.
31 VSS power_in Ground.
32 VDD power_in Digital power supply, VDD = 2.4 V to 3.6 V per the device features.
33 PB12 bidirectional 5 V tolerant FT I/O; also TIM1_BKIN, TIM15_BKIN, SPI2_NSS, EVENTOUT and USART3_CK.
34 PB13 bidirectional 5 V tolerant FTf I/O, Fast Mode Plus capable; also SPI2_SCK, I2C2_SCL, TIM1_CH1N and USART3_CTS.
35 PB14 bidirectional 5 V tolerant FTf I/O, Fast Mode Plus capable; also SPI2_MISO, I2C2_SDA, TIM1_CH2N, TIM15_CH1 and USART3_RTS.
36 PB15 bidirectional 5 V tolerant FT I/O; also SPI2_MOSI, TIM1_CH3N, TIM15_CH1N, TIM15_CH2, WKUP7 and RTC_REFIN.
37 PC6 bidirectional 5 V tolerant FT I/O; also TIM3_CH1.
38 PC7 bidirectional 5 V tolerant FT I/O; also TIM3_CH2.
39 PC8 bidirectional 5 V tolerant FT I/O; also TIM3_CH3.
40 PC9 bidirectional 5 V tolerant FT I/O; also TIM3_CH4.
41 PA8 bidirectional 5 V tolerant FT I/O; also USART1_CK, TIM1_CH1, EVENTOUT and MCO.
42 PA9 bidirectional 5 V tolerant FT I/O; also USART1_TX, TIM1_CH2, TIM15_BKIN, and I2C1_SCL which exists only on STM32F070C6/F6 devices.
43 PA10 bidirectional 5 V tolerant FT I/O; also USART1_RX, TIM1_CH3, TIM17_BKIN, and I2C1_SDA which exists only on STM32F070C6/F6 devices.
44 PA11 bidirectional 5 V tolerant FT I/O; also USART1_CTS, TIM1_CH4, EVENTOUT and USB_DM.
45 PA12 bidirectional 5 V tolerant FT I/O; also USART1_RTS, TIM1_ETR, EVENTOUT and USB_DP.
46 PA13 bidirectional 5 V tolerant FT I/O; after reset it is SWDIO with the internal pull-up enabled; also IR_OUT and USB_NOE.
47 VSS power_in Ground.
48 VDD power_in Digital power supply, VDD = 2.4 V to 3.6 V per the device features.
49 PA14 bidirectional 5 V tolerant FT I/O; after reset it is SWCLK with the internal pull-down enabled; also USART2_TX.
50 PA15 bidirectional 5 V tolerant FT I/O; also SPI1_NSS, USART2_RX, USART4_RTS and EVENTOUT.
51 PC10 bidirectional 5 V tolerant FT I/O; also USART3_TX and USART4_TX.
52 PC11 bidirectional 5 V tolerant FT I/O; also USART3_RX and USART4_RX.
53 PC12 bidirectional 5 V tolerant FT I/O; also USART3_CK and USART4_CK.
54 PD2 bidirectional 5 V tolerant FT I/O; also TIM3_ETR and USART3_RTS.
55 PB3 bidirectional 5 V tolerant FT I/O; also SPI1_SCK and EVENTOUT.
56 PB4 bidirectional 5 V tolerant FT I/O; also SPI1_MISO, TIM17_BKIN, TIM3_CH1 and EVENTOUT.
57 PB5 bidirectional 5 V tolerant FT I/O; also SPI1_MOSI, I2C1_SMBA, TIM16_BKIN, TIM3_CH2 and WKUP6.
58 PB6 bidirectional 5 V tolerant FTf I/O, Fast Mode Plus capable; also I2C1_SCL, USART1_TX and TIM16_CH1N.
59 PB7 bidirectional 5 V tolerant FTf I/O, Fast Mode Plus capable; also I2C1_SDA, USART1_RX, USART4_CTS and TIM17_CH1N.
60 BOOT0 input Dedicated boot memory selection pin (B structure) and input-only pin.
61 PB8 bidirectional 5 V tolerant FTf I/O, Fast Mode Plus capable; also I2C1_SCL and TIM16_CH1.
62 PB9 bidirectional 5 V tolerant FTf I/O, Fast Mode Plus capable; also SPI2_NSS, I2C1_SDA, IR_OUT, TIM17_CH1 and EVENTOUT.
63 VSS power_in Ground.
64 VDD power_in Digital power supply, VDD = 2.4 V to 3.6 V per the device features.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32F070RBT6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32f070rbt6-etched.step / stm32f070rbt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f070rbt6.step / stm32f070rbt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (83 pp, sha256 44d1b9bed723a262, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF