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TIP102
Public Made by Adomby adom
STMicroelectronics Darlington Transistors, TO-220. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTIP102
STMicroelectronics · Darlington Transistors · TO-220
TIP102 from STMicroelectronics, in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | B | input | Base of the NPN Darlington; the datasheet gives IB max 1 A, VEBO max 5 V and a typical 5 kΩ R1 / 150 Ω R2 network. |
| 2 | C | passive | Collector (also the tab); VCEO 100 V, VCBO 100 V, IC 8 A continuous and 15 A peak, with an antiparallel collector-emitter diode. |
| 3 | E | passive | Emitter of the Darlington; the antiparallel diode is connected between emitter and collector, with VF max 2.8 V at IF = 10 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TO-220 |
| Category | Transistors/Thyristors |
| Pins | 3 |
CAD (KiCad official)
- Symbol:
TIP102 - Footprint:
Package_TO_SOT_THT:TO-220-3_Vertical - 3D model: TO-220 (KiCad packages3D, STEP)
- 3D model files:
tip102-etched.step/tip102-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tip102.step/tip102.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (4 pp, sha256
4238c6fc76fd220a, retrieved 2026-10-06, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).