component
74HC02S
Public Made by Adomby adom
GR Logic Gates, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74HC02S
GR · Logic Gates · SOP-14
74HC02S from GR, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Y1 | output | Output of NOR gate 1 (Y = NOT(A1 OR B1)), with a per-pin output current limit of 25 mA absolute maximum. |
| 2 | A1 | input | Input A of NOR gate 1, with input voltage limited to -0.3 V to VCC+0.3 V and input current at most 1 uA at VCC = 6 V. |
| 3 | B1 | input | Input B of NOR gate 1, with input voltage limited to -0.3 V to VCC+0.3 V and input current at most 1 uA at VCC = 6 V. |
| 4 | Y2 | output | Output of NOR gate 2 (Y = NOT(A2 OR B2)), with a per-pin output current limit of 25 mA absolute maximum. |
| 5 | A2 | input | Input A of NOR gate 2, with input voltage limited to -0.3 V to VCC+0.3 V and input current at most 1 uA at VCC = 6 V. |
| 6 | B2 | input | Input B of NOR gate 2, with input voltage limited to -0.3 V to VCC+0.3 V and input current at most 1 uA at VCC = 6 V. |
| 7 | GND | power_in | Ground reference; the datasheet limits total Vcc or GND current to 50 mA absolute maximum. |
| 8 | A3 | input | Input A of NOR gate 3, with input voltage limited to -0.3 V to VCC+0.3 V and input current at most 1 uA at VCC = 6 V. |
| 9 | B3 | input | Input B of NOR gate 3, with input voltage limited to -0.3 V to VCC+0.3 V and input current at most 1 uA at VCC = 6 V. |
| 10 | Y3 | output | Output of NOR gate 3 (Y = NOT(A3 OR B3)), with a per-pin output current limit of 25 mA absolute maximum. |
| 11 | A4 | input | Input A of NOR gate 4, with input voltage limited to -0.3 V to VCC+0.3 V and input current at most 1 uA at VCC = 6 V. |
| 12 | B4 | input | Input B of NOR gate 4, with input voltage limited to -0.3 V to VCC+0.3 V and input current at most 1 uA at VCC = 6 V. |
| 13 | Y4 | output | Output of NOR gate 4 (Y = NOT(A4 OR B4)), with a per-pin output current limit of 25 mA absolute maximum. |
| 14 | VCC | power_in | Positive supply; recommended operating range is 2.0 V to 6.0 V, with an absolute maximum of 6.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GR |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating voltage (absolute maximum) | VCC | 6.5 | V | 1 | |||
| Input/output voltage (absolute maximum) | VIN、VOUT | -0.3 | V | Max printed as Vcc+0.3V; not a numeric value | 1 | ||
| Single pin output current (absolute maximum) | IOUT | 25 | mA | 1 | |||
| Vcc or GND current (absolute maximum) | ICC | 50 | mA | 1 | |||
| Power dissipation (absolute maximum) | PD | 500 | mW | 1 | |||
| Operating temperature (absolute maximum) | TA | 0 | 70 | ℃ | 1 | ||
| Storage temperature | TS | -65 | 150 | ℃ | 1 | ||
| Lead soldering temperature | TW | 260 | ℃ | 10 s | 1 | ||
| Operating voltage (recommended) | VCC | 2 | 5 | 6 | V | 2 | |
| Input/output voltage (recommended) | VIN、VOUT | 0 | V | Max printed as VCC; not a numeric value | 2 | ||
| Input rise/fall time | Tr, tf | 0 | 1000 | ns | VCC=2.0V | 2 | |
| Input rise/fall time | Tr, tf | 0 | 500 | ns | VCC=4.5V | 2 | |
| Input rise/fall time | Tr, tf | 0 | 400 | ns | VCC=6.0V | 2 | |
| Operating temperature (recommended) | TA | 0 | 60 | ℃ | 2 | ||
| High-level input voltage | VIH | 1.5 | V | TA=25℃, VCC=2.0V | 2 | ||
| High-level input voltage | VIH | 3.15 | V | TA=25℃, VCC=4.5V | 2 | ||
| High-level input voltage | VIH | 4.2 | V | TA=25℃, VCC=6.0V | 2 | ||
| Low-level input voltage | VIL | 0.5 | V | TA=25℃, VCC=2.0V | 2 | ||
| Low-level input voltage | VIL | 1.35 | V | TA=25℃, VCC=4.5V | 2 | ||
| Low-level input voltage | VIL | 1.8 | V | TA=25℃, VCC=6.0V | 2 | ||
| High-level output voltage | VOH | 1.9 | V | TA=25℃, VI=VIH or VIL, /IOUT/≤20μA, VCC=2.0V | 2 | ||
| High-level output voltage | VOH | 4.4 | V | TA=25℃, VI=VIH or VIL, /IOUT/≤20μA, VCC=4.5V | 2 | ||
| High-level output voltage | VOH | 5.9 | V | TA=25℃, VI=VIH or VIL, /IOUT/≤20μA, VCC=6.0V | 2 | ||
| High-level output voltage | VOH | 3.7 | 4.4 | V | TA=25℃, VI=VIH or VIL, /IOUT/≤4.0mA, VCC=4.5V | 2 | |
| High-level output voltage | VOH | 5.2 | 5.8 | V | TA=25℃, VI=VIH or VIL, /IOUT/≤5.2mA, VCC=6.0V | 2 | |
| Low-level output voltage | VOL | 0.1 | V | TA=25℃, VI=VIH or VIL, /IOUT/≤20μA, VCC=2.0V | 2 | ||
| Low-level output voltage | VOL | 0.1 | 0.4 | V | TA=25℃, VI=VIH or VIL, /IOUT/≤4.0mA, VCC=4.5V | 2 | |
| Low-level output voltage | VOL | 0.11 | 0.5 | V | TA=25℃, VI=VIH or VIL, /IOUT/≤5.2mA, VCC=6.0V | 2 | |
| Input current | IIN | 1 | uA | TA=25℃, VI=VCC or GND, VCC=6.0V | 2 | ||
| Operating current (quiescent) | ICC | 5.5 | uA | TA=25℃, VI=VCC or GND, IOUT=0μA, VCC=6.0V | 2 | ||
| Maximum propagation delay A, B to Y | tPHL | 30 | ns | TA=25℃, VCC=5.0V, tr=tf≤20ns, CL=15pF | 3 | ||
| Maximum propagation delay A, B to Y | tPLH | 34 | ns | TA=25℃, VCC=5.0V, tr=tf≤20ns, CL=15pF | 3 |
CAD (KiCad official)
- Symbol:
74HC02S - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
74hc02s-etched.step/74hc02s-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc02s.step/74hc02s.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: GR datasheet (5 pp, sha256
77e45e4bc21a4e94, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).