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Contents

README

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TLV803EA29VDBZR

Texas Instruments · Supervisor And Reset ICs · SOT-23-3

TLV803EA29VDBZR from Texas Instruments, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RESET output Active-low output reset signal asserted low when VDD falls below negative voltage threshold (VIT- = 2.93 V), remains low for reset delay period (tD = 200 ms) after VDD rises above rising threshold (VIT+).
2 VDD power_in Input supply voltage monitored by internal comparator; valid operating range 1.7 V to 6 V.
3 GND power_in Ground reference.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-3
Category Power Management (PMIC)
Pins 3

CAD (KiCad official)

  • Symbol: TLV803EA29VDBZR
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3 (KiCad packages3D, STEP)
  • 3D model files: tlv803ea29vdbzr-etched.step / tlv803ea29vdbzr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv803ea29vdbzr.step / tlv803ea29vdbzr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (48 pp, sha256 699aaea1e1af7c74, retrieved 2026-09-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF