SN74LV244APWR
Public Unreviewedby Ray
Texas Instruments Buffer/Driver/Transceiver, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Symbol & Footprint
Schematic Symbol
Open full view ↗PCB Footprint
Open full view ↗Datasheet
Open in new tab ↗Contents
README
markdownSN74LV244APWR
Texas Instruments · Buffer/Driver/Transceiver · TSSOP-20
SN74LV244APWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-low output-enable for buffer group 1 (1Y1-1Y4). When low, the 1Y outputs are enabled; when high, the 1Y outputs are placed in the high-impedance (3-state) mode. |
| 2 | 1A1 | input | Buffer group 1 data input channel 1. Standard CMOS input; drives corresponding 1Y1 output when 1OE is low. |
| 3 | 2Y4 | tri_state | Buffer group 2 output channel 4. 3-state output driven from 2A4 when 2OE is low; high-impedance when 2OE is high. Drive capability up to 16 mA at VCC = 4.5 V. |
| 4 | 1A2 | input | Buffer group 1 data input channel 2. Standard CMOS input; drives corresponding 1Y2 output when 1OE is low. |
| 5 | 2Y3 | tri_state | Buffer group 2 output channel 3. 3-state output driven from 2A3 when 2OE is low; high-impedance when 2OE is high. |
| 6 | 1A3 | input | Buffer group 1 data input channel 3. Standard CMOS input; drives corresponding 1Y3 output when 1OE is low. |
| 7 | 2Y2 | tri_state | Buffer group 2 output channel 2. 3-state output driven from 2A2 when 2OE is low; high-impedance when 2OE is high. |
| 8 | 1A4 | input | Buffer group 1 data input channel 4. Standard CMOS input; drives corresponding 1Y4 output when 1OE is low. |
| 9 | 2Y1 | tri_state | Buffer group 2 output channel 1. 3-state output driven from 2A1 when 2OE is low; high-impedance when 2OE is high. |
| 10 | GND | power_in | Ground reference for the device. Connect to system ground with a low-impedance return path. |
| 11 | 2A1 | input | Buffer group 2 data input channel 1. Standard CMOS input; drives corresponding 2Y1 output when 2OE is low. |
| 12 | 1Y4 | tri_state | Buffer group 1 output channel 4. 3-state output driven from 1A4 when 1OE is low; high-impedance when 1OE is high. |
| 13 | 2A2 | input | Buffer group 2 data input channel 2. Standard CMOS input; drives corresponding 2Y2 output when 2OE is low. |
| 14 | 1Y3 | tri_state | Buffer group 1 output channel 3. 3-state output driven from 1A3 when 1OE is low; high-impedance when 1OE is high. |
| 15 | 2A3 | input | Buffer group 2 data input channel 3. Standard CMOS input; drives corresponding 2Y3 output when 2OE is low. |
| 16 | 1Y2 | tri_state | Buffer group 1 output channel 2. 3-state output driven from 1A2 when 1OE is low; high-impedance when 1OE is high. |
| 17 | 2A4 | input | Buffer group 2 data input channel 4. Standard CMOS input; drives corresponding 2Y4 output when 2OE is low. |
| 18 | 1Y1 | tri_state | Buffer group 1 output channel 1. 3-state output driven from 1A1 when 1OE is low; high-impedance when 1OE is high. |
| 19 | 2OE | input | Active-low output-enable for buffer group 2 (2Y1-2Y4). When low, the 2Y outputs are enabled; when high, the 2Y outputs are placed in the high-impedance (3-state) mode. |
| 20 | VCC | power_in | Positive supply voltage, 2 V to 5.5 V operating range. Decouple locally with a 0.1 uF ceramic capacitor to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
Ordering variants
Same part, different packaging or reel option.
SN74LV244APWRSN74LV244APWRDBSN74LV244APWRDBRSN74LV244APWRDGVSN74LV244APWRDGVRSN74LV244APWRDWSN74LV244APWRDWRSN74LV244APWRNSSN74LV244APWRNSRSN74LV244APWRRGYSN74LV244APWRRGYRSN74LV244APWRRKSSN74LV244APWRRKSRSN74LV244APWRDGSSN74LV244APWRDGSR
CAD (KiCad official)
- Symbol:
SN74LV244APWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
sn74lv244apwr.step |
267 KB | You want the bare part, or you mark your own boards. |
sn74lv244apwr-etched.step |
2.7 MB | You want the part with SN74LV244APWR already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 700 faces against 327 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (42 pp, sha256
cd9506c8b2555370, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).