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Contents

README

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LX3400S

ChipLink Tech · MOSFETs · SOT-23

LX3400S from ChipLink Tech, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; drives the N-channel MOSFET with VGS rated ±12V maximum and operation with gate voltage as low as 2.5V (Vth 0.7V min to 1.2V max at 250uA).
2 S passive Source; connects to the body diode anode, with continuous current up to 5.1A (ID) and diode forward current IS of 5.1A.
3 D passive Drain; rated VDS 30V maximum, ID 5.1A continuous and 20A pulsed (IDM), with RDS(ON) of 33mΩ max at VGS=10V.

Key specifications

Parameter Value
Manufacturer ChipLink Tech
Package SOT-23
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source On-Resistance RDS(ON) 24 33 mΩ VGS=10V, ID=5A 2
Drain-Source On-Resistance RDS(ON) 26 39 mΩ VGS=4.5V, ID=4A 2
Drain-Source On-Resistance RDS(ON) 33 55 mΩ VGS=2.5V, ID=3A 2
Drain-Source Voltage VDS 30 V TA=25℃ 1
Gate-Source Voltage VGS -12 12 V TA=25℃ 1
Continuous Drain Current ID 5.1 A TA=25℃ 1
Pulsed Drain Current IDM 20 A Repetitive rating, pulse width limited by TJ(MAX)=150℃ (Note B) 1
Maximum Power Dissipation PD 1.3 W TA=25℃; based on TJ(MAX)=150℃, ≤10s junction-to-ambient thermal resistance (Note A) 1
Junction and Storage Temperature Range TJ, TSTG -55 150 ℃ 1
Thermal Resistance, Junction to Ambient RQJA 96 ℃/W 1
Gate-Threshold Voltage Vth(GS) 0.7 0.9 1.2 V VDS= VGS, ID=250 uA 2
Gate-body Leakage IGSS -100 100 nA VDS=0V, VGS=±12V 2
Drain-Source Breakdown Voltage BVDSS 30 V VGS=0V, ID=250uA 2
Zero Gate Voltage Drain Current IDSS 1 uA VDS=30V, VGS=0V 2
Forward Transconductance gFS 10 s VDS=5V, ID=5A 2
Input Capacitance Ciss 595 pF VDS = 15V, VGS =0V, F=1MHz 2
Output Capacitance Coss 39 pF VDS = 15V, VGS =0V, F=1MHz 2
Reverse Transfer Capacitance Crss 36 pF VDS = 15V, VGS =0V, F=1MHz 2
Turn-on Delay Time td(on) 3 nS VDD= 15V, RL=3Ω, VGS = 10V, RGEN=3Ω 2
Turn-on Rise Time tr 4.5 nS VDD= 15V, RL=3Ω, VGS = 10V, RGEN=3Ω 2
Turn-off Delay Time td(off) 25 nS VDD= 15V, RL=3Ω, VGS = 10V, RGEN=3Ω 2
Turn-off Fall Time tf 3.8 nS VDD= 15V, RL=3Ω, VGS = 10V, RGEN=3Ω 2
Total Gate Charge Qg 9.3 nC VDS = 15V, ID=5A, VGS =4.5V 2
Gate-Source Charge Qgs 1.6 nC VDS = 15V, ID=5A, VGS =4.5V 2
Gate-Drain Charge Qgd 2.1 nC VDS = 15V, ID=5A, VGS =4.5V 2
Diode Forward Voltage VSD 1.2 V VGS =0V, ID=5A 2
Diode Forward Current Is 5.1 A 2

CAD (KiCad official)

  • Symbol: LX3400S
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: lx3400s-etched.step / lx3400s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lx3400s.step / lx3400s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ChipLink Tech datasheet (6 pp, sha256 2afc283c009a6e3f, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF