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README

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UDN2987LWTR-6-T

Allegro MicroSystems LLC · Darlington Transistor Arrays · SOIC-20-300mil

UDN2987LWTR-6-T from Allegro MicroSystems LLC, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN1 input Logic input 1 controls OUT1, with the output switched on by an active-high input; VIN(ON) min 2.4 V, VIN(OFF) max 0.4 V, and input voltage rating -0.3 to 14 V.
2 IN2 input Logic input 2 controls OUT2, with the output switched on by an active-high input; VIN(ON) min 2.4 V, VIN(OFF) max 0.4 V, and input voltage rating -0.3 to 14 V.
3 IN3 input Logic input 3 controls OUT3, with the output switched on by an active-high input; VIN(ON) min 2.4 V, VIN(OFF) max 0.4 V, and input voltage rating -0.3 to 14 V.
4 IN4 input Logic input 4 controls OUT4, with the output switched on by an active-high input; VIN(ON) min 2.4 V, VIN(OFF) max 0.4 V, and input voltage rating -0.3 to 14 V.
5 IN5 input Logic input 5 controls OUT5, with the output switched on by an active-high input; VIN(ON) min 2.4 V, VIN(OFF) max 0.4 V, and input voltage rating -0.3 to 14 V.
6 IN6 input Logic input 6 controls OUT6, with the output switched on by an active-high input; VIN(ON) min 2.4 V, VIN(OFF) max 0.4 V, and input voltage rating -0.3 to 14 V.
7 IN7 input Logic input 7 controls OUT7, with the output switched on by an active-high input; VIN(ON) min 2.4 V, VIN(OFF) max 0.4 V, and input voltage rating -0.3 to 14 V.
8 IN8 input Logic input 8 controls OUT8, with the output switched on by an active-high input; VIN(ON) min 2.4 V, VIN(OFF) max 0.4 V, and input voltage rating -0.3 to 14 V.
9 FAULT output Common open-collector fault output that is pulled low on any channel overcurrent or chip thermal shutdown, with VCE max 35 V and IC max 30 mA.
10 OE/R input Logic input for output enable and reset: high enables all outputs, while low (or floating, via internal pull-down) inhibits all outputs and resets the eight latches, requiring a reset pulse of at least 1 µs.
11 VS power_in Driver supply voltage with a functional range of 4.75 V to 35 V and an absolute maximum of 35 V.
12 GND power_in Supply ground for the device.
13 OUT8 output Output 8 to load, sourcing up to 350 mA with 35 V minimum output breakdown and overcurrent shutdown at -370 mA minimum.
14 OUT7 output Output 7 to load, sourcing up to 350 mA with 35 V minimum output breakdown and overcurrent shutdown at -370 mA minimum.
15 OUT6 output Output 6 to load, sourcing up to 350 mA with 35 V minimum output breakdown and overcurrent shutdown at -370 mA minimum.
16 OUT5 output Output 5 to load, sourcing up to 350 mA with 35 V minimum output breakdown and overcurrent shutdown at -370 mA minimum.
17 OUT4 output Output 4 to load, sourcing up to 350 mA with 35 V minimum output breakdown and overcurrent shutdown at -370 mA minimum.
18 OUT3 output Output 3 to load, sourcing up to 350 mA with 35 V minimum output breakdown and overcurrent shutdown at -370 mA minimum.
19 OUT2 output Output 2 to load, sourcing up to 350 mA with 35 V minimum output breakdown and overcurrent shutdown at -370 mA minimum.
20 OUT1 output Output 1 to load, sourcing up to 350 mA with 35 V minimum output breakdown and overcurrent shutdown at -370 mA minimum.

Key specifications

Parameter Value
Manufacturer Allegro MicroSystems LLC
Package SOIC-20-300mil
Category Triode/MOS Tube/Transistor
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VS 35 V 2
Continuous Output Current IOUT -500 mA Outputs are disabled at approximately -500 mA 2
FAULT Output Voltage VCE 35 V 2
FAULT Output Current IC 30 mA 2
Input Voltage VIN -0.3 14 V 2
Junction Temperature TJ 150 °C 2
Storage Temperature Range TS -55 150 °C Range N 2
Operating Temperature Range TA -20 85 °C 2
Supply Voltage Functional Range VS 4.75 35 V 4
Output Leakage Current IOUTCEX -200 μA VIN = 0.4 V, all inputs simultaneously 4
Output Sustaining Voltage VOUT(sus) 35 V IOUT = -350 mA, L = 2.0 mH 4
Output Saturation Voltage VOUT(SAT) 1.6 1.8 V VIN = 2.4 V, IOUT = -100 mA 4
Output Saturation Voltage VOUT(SAT) 1.7 1.9 V VIN = 2.4 V, IOUT = -225 mA 4
Output Saturation Voltage VOUT(SAT) 1.8 2 V VIN = 2.4 V, IOUT = -350 mA 4
Channel Shut Down Threshold IM -500 -370 mA VIN = 2.4 V, Vs = 30 V 4
FAULT Leakage Current ICEX 100 μA VCC = 35 V 4
FAULT Saturation Voltage VCE(SAT) 0.3 0.8 V IC = 30 mA 4
Input Voltage ON VIN(ON) 2.4 V 4
Input Voltage OFF VIN(OFF) 0.4 V 4
Input Current ON IIN(ON) 100 μA VIN = 2.4 V (INx, OE/R pins) 4
Input Current ON IIN(ON) 600 μA VIN = 5.0 V (INx, OE/R pins) 4
Input Current ON IIN(ON) 1000 μA VIN = 12 V (INx, OE/R pins) 4
Input Current OFF IIN(OFF) 15 μA VIN = 0.4 V (INx, OE/R pins) 4
Clamp Diode Leakage Current IR 50 μA VR = 35 V, TA = 70°C 4
Clamp Diode Forward Voltage VF 1.5 1.8 V IF = 350 mA 4
Supply Current ON IS(ON) 7 18 mA VIN = 2.4 V, all inputs simultaneously; outputs open 4
Supply Current OFF IS(OFF) 6 12 mA VIN = 0.4 V, all inputs simultaneously 4
Reset Pulse Duration tRPD 1 μs 4
Propagation Delay Time LOW-to-HIGH tPLH 100 600 ns VS = 35 V, RL = 100 Ω, CLOAD = 30 pF 4
Propagation Delay Time HIGH-to-LOW tPHL 200 1000 ns VS = 35 V, RL = 100 Ω, CLOAD = 30 pF 4
Package Thermal Resistance RθJA 48 °C/W Package LW, on 4-layer board based on JEDEC standard 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin The UDN2987LW-6 is supplied in a 20-lead small-outline (SOIC-W) plastic package. All packages are lead (Pb) free, with 100% matte￾tin leadframe plating. 2

CAD (KiCad official)

  • Symbol: UDN2987LWTR-6-T
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: udn2987lwtr-6-t-etched.step / udn2987lwtr-6-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); udn2987lwtr-6-t.step / udn2987lwtr-6-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Allegro MicroSystems LLC datasheet (9 pp, sha256 19e74d2461f620aa, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF