component
74HC20NS14ARDQ
Public Made by Adomby adom
GR Logic Gates, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74HC20NS14ARDQ
GR · Logic Gates · SOP-14
74HC20NS14ARDQ from GR, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Buffered data input A of the first 4-input NAND gate. |
| 2 | 1B | input | Buffered data input B of the first 4-input NAND gate. |
| 3 | NC | unconnected | Not connected. |
| 4 | 1C | input | Buffered data input C of the first 4-input NAND gate. |
| 5 | 1D | input | Buffered data input D of the first 4-input NAND gate. |
| 6 | 1Y | output | Data output of the first NAND gate. |
| 7 | GND | power_in | Ground reference; all voltages are referenced to GND (0 V). |
| 8 | 2Y | output | Data output of the second NAND gate. |
| 9 | 2A | input | Buffered data input A of the second 4-input NAND gate. |
| 10 | 2B | input | Buffered data input B of the second 4-input NAND gate. |
| 11 | NC | unconnected | Not connected. |
| 12 | 2C | input | Buffered data input C of the second 4-input NAND gate. |
| 13 | 2D | input | Buffered data input D of the second 4-input NAND gate. |
| 14 | VCC | power_in | Supply voltage: recommended 2 V to 6 V, absolute maximum -0.5 V to 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GR |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | -0.5 | 7 | V | 3 | ||
| Power Dissipation | PD | 500 | mW | 3 | |||
| Junction Temperature | TJ | 125 | ℃ | 3 | |||
| Operating Temperature | TOP | -40 | 85 | ℃ | 3 | ||
| Supply Voltage | VCC | 2 | 5 | 6 | V | 4 | |
| High Level Input Voltage | VIH | 1.5 | V | VCC=2V | 4 | ||
| High Level Input Voltage | VIH | 3.15 | V | VCC=4.5V | 4 | ||
| High Level Input Voltage | VIH | 4.2 | V | VCC=6V | 4 | ||
| Low Level Input Voltage | VIL | 0.5 | V | VCC=2V | 4 | ||
| Low Level Input Voltage | VIL | 1.35 | V | VCC=4.5V | 4 | ||
| Low Level Input Voltage | VIL | 1.8 | V | VCC=6V | 4 | ||
| Input Voltage | VI | 0 | V | 4 | |||
| High Level Output Voltage | VOH | 1.9 | V | VCC=2V,IO=-20uA | 4 | ||
| High Level Output Voltage | VOH | 4.4 | V | VCC=4.5V,IO=-20uA | 4 | ||
| High Level Output Voltage | VOH | 5.9 | V | VCC=6V,IO=-20uA | 4 | ||
| High Level Output Voltage | VOH | 4 | V | VCC=4.5V,IO=-4mA | 4 | ||
| High Level Output Voltage | VOH | 5.5 | V | VCC=6V,IO=-5.2mA | 4 | ||
| Low Level Output Voltage | VOL | 0.1 | V | VCC=2V,IO=20uA | 4 | ||
| Low Level Output Voltage | VOL | 0.26 | V | VCC=4.5V,IO=4mA | 4 | ||
| Input Leakage Current | II | -1 | 0 | 1 | uA | VCC=6V,VI=VCC or GND | 4 |
| Quiescent Supply Current | ICC | 0 | 10 | uA | VCC=6V,VI=VCC/GND | 4 |
CAD (KiCad official)
- Symbol:
74HC20NS14ARDQ - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
74hc20ns14ardq-etched.step/74hc20ns14ardq-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc20ns14ardq.step/74hc20ns14ardq.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: GR datasheet (8 pp, sha256
75bd20d48989092f, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).