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SN74HC193N

Public Made by Adom

by adom

lingxingic Counters, Dividers, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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SN74HC193N

lingxingic · Counters, Dividers · DIP-16

SN74HC193N from lingxingic, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D1 input Parallel data input 1, loaded into the counter asynchronously when PL is LOW.
2 Q1 output Flip-flop output 1 of the 4-bit counter; set LOW by a HIGH on MR.
3 Q0 output Flip-flop output 0 of the 4-bit counter; set LOW by a HIGH on MR.
4 CPD input Count-down clock input; outputs change on the LOW-to-HIGH edge while CPU is held HIGH.
5 CPU input Count-up clock input; outputs change on the LOW-to-HIGH edge while CPD is held HIGH.
6 Q2 output Flip-flop output 2 of the 4-bit counter; set LOW by a HIGH on MR.
7 Q3 output Flip-flop output 3 of the 4-bit counter; set LOW by a HIGH on MR.
8 GND power_in Ground (0 V) reference for all voltages.
9 D3 input Parallel data input 3, loaded asynchronously when PL is LOW.
10 D2 input Parallel data input 2, loaded asynchronously when PL is LOW.
11 PL input Asynchronous parallel load input, active LOW; it disables the MR path and loads D0 to D3 into the outputs.
12 TCU output Terminal count up (carry) output, active LOW; goes LOW at count 15 on the HIGH-to-LOW transition of CPU.
13 TCD output Terminal count down (borrow) output, active LOW; goes LOW in the zero state when CPD goes LOW.
14 MR input Asynchronous master reset input, active HIGH; forces Q0 to Q3 LOW and overrides both clock inputs.
15 D0 input Parallel data input 0, loaded asynchronously when PL is LOW.
16 VCC power_in Supply voltage; 2.0 V to 6.0 V for SN74HC193 and 4.5 V to 5.5 V for SN74HCT193 per the recommended operating conditions.

Key specifications

Parameter Value
Manufacturer lingxingic
Package DIP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC 2 5 6 V 7
input voltage VI 0 V 7
output voltage VO 0 V 7
input transition rise and fall rate Δt/ΔV 625 ns/V VCC=2.0V 7
input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 7
input transition rise and fall rate Δt/ΔV 83 ns/V VCC=6.0V 7
ambient temperature Tamb -40 105 ℃ 7
supply voltage VCC -0.5 7 V 6
input clamping current IIK -20 20 mA VI < -0.5V or VI > VCC+0.5V 6
output clamping current IOK -20 20 mA VO < -0.5V or VO > VCC+0.5V 6
output current IO -25 25 mA VO= -0.5V to (VCC+0.5V) 6
supply current ICC 50 mA 6
ground current IGND -50 mA 6
storage temperature Tstg -65 150 ℃ 6
total power dissipation Ptot 500 mW 6
soldering temperature TL 245 ℃ 10s, DIP 6
HIGH-level input voltage VIH 1.5 1.2 V Tamb=25℃; VCC=2.0V 7
HIGH-level input voltage VIH 3.15 2.4 V Tamb=25℃; VCC=4.5V 7
HIGH-level input voltage VIH 4.2 3.2 V Tamb=25℃; VCC=6.0V 7
LOW-level input voltage VIL 0.8 0.5 V Tamb=25℃; VCC=2.0V 7
LOW-level input voltage VIL 2.1 1.35 V Tamb=25℃; VCC=4.5V 7
LOW-level input voltage VIL 2.8 1.8 V Tamb=25℃; VCC=6.0V 7
HIGH-level output voltage VOH 1.9 2 V Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=2.0V 7
HIGH-level output voltage VOH 4.4 4.5 V Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=4.5V 7
HIGH-level output voltage VOH 5.9 6 V Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=6.0V 7
HIGH-level output voltage VOH 3.98 4.32 V Tamb=25℃; VI=VIH or VIL; IO=-4mA; VCC=4.5V 7
HIGH-level output voltage VOH 5.48 5.81 V Tamb=25℃; VI=VIH or VIL; IO=-5.2mA; VCC=6.0V 7
LOW-level output voltage VOL 0 0.1 V Tamb=25℃; VI=VIH or VIL; IO=20uA; VCC=2.0V 7
LOW-level output voltage VOL 0.15 0.26 V Tamb=25℃; VI=VIH or VIL; IO=4mA; VCC=4.5V 7
LOW-level output voltage VOL 0.16 0.26 V Tamb=25℃; VI=VIH or VIL; IO=5.2mA; VCC=6.0V 7
input leakage current II -0.1 0.1 uA Tamb=25℃; VI=VCC or GND; VCC=6.0V 7
supply current ICC 8 uA Tamb=25℃; VI=VCC or GND; IO=0A; VCC=6.0V 7
HIGH-level input voltage VIH 1.5 V Tamb=-40℃ to +105℃; VCC=2.0V 9
HIGH-level input voltage VIH 3.15 V Tamb=-40℃ to +105℃; VCC=4.5V 9
HIGH-level input voltage VIH 4.2 V Tamb=-40℃ to +105℃; VCC=6.0V 9
LOW-level input voltage VIL 0.5 V Tamb=-40℃ to +105℃; VCC=2.0V 9
LOW-level input voltage VIL 1.35 V Tamb=-40℃ to +105℃; VCC=4.5V 9
LOW-level input voltage VIL 1.8 V Tamb=-40℃ to +105℃; VCC=6.0V 9
HIGH-level output voltage VOH 1.9 V Tamb=-40℃ to +105℃; VI=VIH or VIL; IO=-20uA; VCC=2.0V 9
HIGH-level output voltage VOH 4.4 V Tamb=-40℃ to +105℃; VI=VIH or VIL; IO=-20uA; VCC=4.5V 9
HIGH-level output voltage VOH 5.9 V Tamb=-40℃ to +105℃; VI=VIH or VIL; IO=-20uA; VCC=6.0V 9
HIGH-level output voltage VOH 3.7 V Tamb=-40℃ to +105℃; VI=VIH or VIL; IO=-4mA; VCC=4.5V 9
HIGH-level output voltage VOH 5.2 V Tamb=-40℃ to +105℃; VI=VIH or VIL; IO=-5.2mA; VCC=6.0V 9
LOW-level output voltage VOL 0.1 V Tamb=-40℃ to +105℃; VI=VIH or VIL; IO=20uA; VCC=2.0V 9
LOW-level output voltage VOL 0.4 V Tamb=-40℃ to +105℃; VI=VIH or VIL; IO=4mA; VCC=4.5V 9
input leakage current II -1 1 uA Tamb=-40℃ to +105℃; VI=VCC or GND; VCC=6.0V 9
supply current ICC 160 uA Tamb=-40℃ to +105℃; VI=VCC or GND; IO=0A; VCC=6.0V 9
propagation delay tpd 325 ns CPU, CPD to Qn; see Figure 6; VCC=2.0V; Tamb=-40℃ to +105℃ 15
propagation delay tpd 65 ns CPU, CPD to Qn; see Figure 6; VCC=4.5V; Tamb=-40℃ to +105℃ 15
propagation delay tpd 55 ns CPU, CPD to Qn; see Figure 6; VCC=6.0V; Tamb=-40℃ to +105℃ 15
maximum frequency fmax 2.6 MHz CPU, CPD; see Figure 6; VCC=2.0V; Tamb=-40℃ to +105℃ 16
maximum frequency fmax 13 MHz CPU, CPD; see Figure 6; VCC=4.5V; Tamb=-40℃ to +105℃ 16
maximum frequency fmax 15 MHz CPU, CPD; see Figure 6; VCC=6.0V; Tamb=-40℃ to +105℃ 16

CAD (KiCad official)

  • Symbol: SN74HC193N
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: DIP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74hc193n-etched.step / sn74hc193n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc193n.step / sn74hc193n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (23 pp, sha256 7ddb47f2358a51ce, retrieved 2026-10-15, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF