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SN74LV541ATDBR
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Texas Instruments Buffers, Drivers, Receivers, Transceivers, SSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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Symbol & Footprint
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README
markdownSN74LV541ATDBR
Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SSOP-20
SN74LV541ATDBR from Texas Instruments, in a SSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE1 | input | Active-low output enable; when OE1 or OE2 is high, all Y outputs are forced to the high-impedance state, and OE should be tied to VCC through a pullup resistor to keep outputs high-Z during power-up or power-down. |
| 2 | A1 | input | Data input for buffer channel 1, TTL-voltage compatible with VIH minimum 2 V and VIL maximum 0.8 V at VCC = 4.5 V to 5.5 V, and an input voltage range of 0 to 5.5 V. |
| 3 | A2 | input | Data input for buffer channel 2, TTL-voltage compatible with VIH minimum 2 V and VIL maximum 0.8 V at VCC = 4.5 V to 5.5 V, and an input voltage range of 0 to 5.5 V. |
| 4 | A3 | input | Data input for buffer channel 3, TTL-voltage compatible with VIH minimum 2 V and VIL maximum 0.8 V at VCC = 4.5 V to 5.5 V, and an input voltage range of 0 to 5.5 V. |
| 5 | A4 | input | Data input for buffer channel 4, TTL-voltage compatible with VIH minimum 2 V and VIL maximum 0.8 V at VCC = 4.5 V to 5.5 V, and an input voltage range of 0 to 5.5 V. |
| 6 | A5 | input | Data input for buffer channel 5, TTL-voltage compatible with VIH minimum 2 V and VIL maximum 0.8 V at VCC = 4.5 V to 5.5 V, and an input voltage range of 0 to 5.5 V. |
| 7 | A6 | input | Data input for buffer channel 6, TTL-voltage compatible with VIH minimum 2 V and VIL maximum 0.8 V at VCC = 4.5 V to 5.5 V, and an input voltage range of 0 to 5.5 V. |
| 8 | A7 | input | Data input for buffer channel 7, TTL-voltage compatible with VIH minimum 2 V and VIL maximum 0.8 V at VCC = 4.5 V to 5.5 V, and an input voltage range of 0 to 5.5 V. |
| 9 | A8 | input | Data input for buffer channel 8, TTL-voltage compatible with VIH minimum 2 V and VIL maximum 0.8 V at VCC = 4.5 V to 5.5 V, and an input voltage range of 0 to 5.5 V. |
| 10 | GND | power_in | Ground reference for the device. |
| 11 | Y8 | tri_state | Noninverting 3-state output for channel 8, rated IOH of -16 mA and IOL of 16 mA at VCC = 4.5 V, which is high-impedance when OE1 or OE2 is high. |
| 12 | Y7 | tri_state | Noninverting 3-state output for channel 7, rated IOH of -16 mA and IOL of 16 mA at VCC = 4.5 V, which is high-impedance when OE1 or OE2 is high. |
| 13 | Y6 | tri_state | Noninverting 3-state output for channel 6, rated IOH of -16 mA and IOL of 16 mA at VCC = 4.5 V, which is high-impedance when OE1 or OE2 is high. |
| 14 | Y5 | tri_state | Noninverting 3-state output for channel 5, rated IOH of -16 mA and IOL of 16 mA at VCC = 4.5 V, which is high-impedance when OE1 or OE2 is high. |
| 15 | Y4 | tri_state | Noninverting 3-state output for channel 4, rated IOH of -16 mA and IOL of 16 mA at VCC = 4.5 V, which is high-impedance when OE1 or OE2 is high. |
| 16 | Y3 | tri_state | Noninverting 3-state output for channel 3, rated IOH of -16 mA and IOL of 16 mA at VCC = 4.5 V, which is high-impedance when OE1 or OE2 is high. |
| 17 | Y2 | tri_state | Noninverting 3-state output for channel 2, rated IOH of -16 mA and IOL of 16 mA at VCC = 4.5 V, which is high-impedance when OE1 or OE2 is high. |
| 18 | Y1 | tri_state | Noninverting 3-state output for channel 1, rated IOH of -16 mA and IOL of 16 mA at VCC = 4.5 V, which is high-impedance when OE1 or OE2 is high. |
| 19 | OE2 | input | Active-low output enable; when OE2 or OE1 is high, all Y outputs are forced to the high-impedance state, and OE should be tied to VCC through a pullup resistor to keep outputs high-Z during power-up or power-down. |
| 20 | VCC | power_in | Supply voltage, 4.5 V to 5.5 V recommended operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-20 |
| Category | Logic |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VCC | -0.5 | 7 | V | 3 | ||
| Input voltage range | VI | -0.5 | 7 | V | 3 | ||
| Voltage applied to any output in the high-impedance or power-off state | VO | -0.5 | 7 | V | high-impedance or power-off state | 3 | |
| Output voltage applied in the high or low state | VO | -0.5 | V | high or low state | 3 | ||
| Input clamp current | IIK | -20 | mA | VI < 0 | 3 | ||
| Output clamp current | IOK | -50 | mA | VO < 0 | 3 | ||
| Continuous output current | IO | -35 | 35 | mA | VO = 0 to VCC | 3 | |
| Continuous current through VCC or GND | -70 | 70 | mA | 3 | |||
| Storage temperature range | Tstg | -65 | 150 | °C | 3 | ||
| Supply voltage | VCC | 4.5 | 5.5 | V | 3 | ||
| High-level input voltage | VIH | 2 | V | VCC = 4.5 V to 5.5 V | 3 | ||
| Low-level input voltage | VIL | 0.8 | V | VCC = 4.5 V to 5.5 V | 3 | ||
| Input voltage | VI | 0 | 5.5 | V | 3 | ||
| Output voltage, high or low state | VO | 0 | V | high or low state | 3 | ||
| Output voltage, 3-state | VO | 0 | 5.5 | V | 3-state | 3 | |
| High-level output current | IOH | -16 | mA | VCC = 4.5 V to 5.5 V | 3 | ||
| Low-level output current | IOL | 16 | mA | VCC = 4.5 V to 5.5 V | 3 | ||
| Input transition rise or fall rate | Δt/Δv | 20 | ns/V | VCC = 4.5 V to 5.5 V | 3 | ||
| Operating free-air temperature | TA | -40 | 125 | °C | 3 | ||
| High-level output voltage | VOH | 4.4 | V | IOH = -50 μA; VCC = 4.5 V; TA = -40°C to 125°C | 4 | ||
| High-level output voltage | VOH | 3.8 | V | IOH = -16 mA; VCC = 4.5 V; TA = -40°C to 125°C | 4 | ||
| Low-level output voltage | VOL | 0.1 | V | IOL = 50 μA; VCC = 4.5 V; TA = -40°C to 125°C | 4 | ||
| Low-level output voltage | VOL | 0.55 | V | IOL = 16 mA; VCC = 4.5 V; TA = -40°C to 125°C | 4 | ||
| Input current | II | -1 | 1 | μA | VI = 5.5 V or GND; VCC = 0 to 5.5 V; TA = -40°C to 125°C | 4 | |
| Off-state output current | IOZ | -2.5 | 2.5 | μA | VO = VCC or GND; VCC = 5.5 V; TA = -40°C to 125°C | 4 | |
| Supply current | ICC | 20 | μA | VI = VCC or GND, IO = 0; VCC = 5.5 V; TA = -40°C to 125°C | 4 | ||
| Supply current change per input | ΔICC | 150 | mA | One input at 3.4 V, other inputs at VCC or GND; VCC = 5.5 V; TA = -40°C to 125°C | 4 | ||
| Power-off leakage current | Ioff | 5 | μA | VI or VO = 0 to 5.5 V; TA = -40°C to 125°C | 4 | ||
| Quiet output, maximum dynamic VOL | VOL(P) | 1.1 | 1.5 | V | VCC = 5 V, CL = 50 pF, TA = 25°C | 4 | |
| Quiet output, minimum dynamic VOL | VOL(V) | -1.5 | -1.1 | V | VCC = 5 V, CL = 50 pF, TA = 25°C | 4 | |
| Quiet output, minimum dynamic VOH | VOH(V) | 4 | V | VCC = 5 V, CL = 50 pF, TA = 25°C | 4 | ||
| High-level dynamic input voltage | VIH(D) | 2 | V | VCC = 5 V, CL = 50 pF, TA = 25°C | 4 | ||
| Low-level dynamic input voltage | VIL(D) | 0.8 | V | VCC = 5 V, CL = 50 pF, TA = 25°C | 4 | ||
| Propagation delay A to Y | tpd | 1 | 9 | ns | VCC = 5 V ± 0.5 V; CL = 15 pF; TA = -40°C to 125°C | 4 | |
| Enable time OE to Y | ten | 1 | 14 | ns | VCC = 5 V ± 0.5 V; CL = 15 pF; TA = -40°C to 125°C | 4 | |
| Disable time OE to Y | tdis | 1 | 8.5 | ns | VCC = 5 V ± 0.5 V; CL = 15 pF; TA = -40°C to 125°C | 4 | |
| Propagation delay A to Y | tpd | 1 | 10 | ns | VCC = 5 V ± 0.5 V; CL = 50 pF; TA = -40°C to 125°C | 4 | |
| Enable time OE to Y | ten | 1 | 15.2 | ns | VCC = 5 V ± 0.5 V; CL = 50 pF; TA = -40°C to 125°C | 4 | |
| Disable time OE to Y | tdis | 1 | 14 | ns | VCC = 5 V ± 0.5 V; CL = 50 pF; TA = -40°C to 125°C | 4 | |
| Output-to-output skew | tsk(o) | 1 | ns | VCC = 5 V ± 0.5 V; TA = -40°C to 125°C | 4 | ||
| Package thermal impedance, DB package | θJA | 70 | °C/W | DB package; JESD 51-7 | 3 |
CAD (KiCad official)
- Symbol:
SN74LV541ATDBR - Footprint:
Adom_Gen:Texas_Instruments_SN74 - 3D model: SSOP-20 (KiCad packages3D, STEP)
- 3D model files:
sn74lv541atdbr-etched.step/sn74lv541atdbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74lv541atdbr.step/sn74lv541atdbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (27 pp, sha256
49aa64a69c69cfac, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).