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TPS73630DCQR
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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-223-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS73630DCQR
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223-6
TPS73630DCQR from Texas Instruments, in a SOT-223-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input supply pin; the recommended input voltage range is 1.7 V to 5.5 V, and the absolute maximum VIN is 6 V. |
| 2 | OUT | power_out | Regulator output, which remains stable without any external output capacitor and is rated for an absolute maximum of 5.5 V. |
| 3 | GND | power_in | Ground pin; the bypass-capacitor ground connections must go directly to the GND pin. |
| 4 | NR/FB | passive | For the fixed-voltage versions (including TPS73630) this is the NR pin, where an external noise-reduction capacitor (for example 10 nF) is connected to ground to lower output noise; the adjustable version uses this pin as FB. |
| 5 | EN | input | Active-high enable compatible with standard TTL-CMOS levels: VEN ≥ 1.7 V turns the regulator on and VEN ≤ 0.5 V shuts it down. |
| 6 | GND | power_in | Second ground pin on the SOT-223 package, electrically the same ground as pin 3. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-223-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range | VIN | 1.7 | 5.5 | V | 6 | ||
| Output voltage accuracy, nominal | -0.5 | 0.5 | % | 标称值 TJ = 25°C | 6 | ||
| Output voltage accuracy over line, load and temperature | -1 | 0.5 | 1 | % | VOUT + 0.5V ≤ VIN ≤ 5.5V; 10mA ≤ IOUT ≤ 400mA | 6 | |
| Dropout voltage | VDO | 75 | 200 | mV | VIN = VOUT(nom) - 0.1V, IOUT = 400mA | 6 | |
| Output current limit (legacy device) | ICL | 400 | 650 | 800 | mA | VOUT = 0.9 × VOUT(nom); 传统器件 | 6 |
| Output current limit (legacy device, 0-70°C row) | ICL | 500 | 800 | mA | VOUT = 0.9 × VOUT(nom); 3.6V ≤ VIN ≤ 4.2V, 0℃ ≤ TJ ≤ 70℃; 传统器件 | 6 | |
| Output current limit (new device) | ICL | 500 | 800 | mA | VOUT = 0.9 × VOUT(nom); 新器件 | 6 | |
| Reverse leakage current (fixed-voltage versions) | IREV | 0.1 | 10 | µA | VEN ≤ 0.5V, 0V ≤ VIN ≤ VOUT | 6 | |
| Ground pin current at IOUT = 10mA (legacy device) | IGND | 400 | 550 | µA | IOUT = 10mA (IQ); 传统器件 | 6 | |
| Ground pin current at IOUT = 10mA (new device) | IGND | 400 | 630 | µA | IOUT = 10mA (IQ); 新器件 | 6 | |
| Ground pin current at IOUT = 400mA | IGND | 800 | 1000 | µA | IOUT = 400mA | 6 | |
| Shutdown current (legacy device) | ISHDN | 0.02 | 1 | µA | VEN ≤ 0.5V, VOUT ≤ VIN ≤ 5.5V, –40°C ≤ TJ ≤ 100℃; 传统器件 | 6 | |
| Shutdown current (new device) | ISHDN | 0.02 | 1 | µA | VEN ≤ 0.5V, VOUT ≤ VIN ≤ 5.5V; 新器件 | 6 | |
| EN pin high-level voltage (enabled) | VEN(high) | 1.7 | V | 6 | |||
| EN pin low-level voltage (shutdown) | VEN(low) | 0 | 0.5 | V | 6 | ||
| Enable pin current (enabled) | IEN(high) | 0.02 | 0.1 | µA | VEN = 5.5V | 6 | |
| Operating junction temperature | TJ | -40 | 125 | ℃ | 6 | ||
| Junction-to-ambient thermal resistance (DCQ) | RθJA | 118.7 | °C/W | DCQ (SOT-223, 6-pin) package, JEDEC high-K board | 5 | ||
| Junction-to-case (top) thermal resistance (DCQ) | RθJC(top) | 64.9 | °C/W | DCQ (SOT-223, 6-pin) package | 5 | ||
| Junction-to-board thermal resistance (DCQ) | RθJB | 65 | °C/W | DCQ (SOT-223, 6-pin) package | 5 | ||
| Junction-to-top characterization parameter (DCQ) | ψJT | 14 | °C/W | DCQ (SOT-223, 6-pin) package | 5 | ||
| Junction-to-board characterization parameter (DCQ) | ψJB | 63.8 | °C/W | DCQ (SOT-223, 6-pin) package | 5 |
CAD (KiCad official)
- Symbol:
TPS73630DCQR - Footprint:
Package_TO_SOT_SMD:SOT-223-6 - 3D model: SOT-223-6 (KiCad packages3D, STEP)
- 3D model files:
tps73630dcqr-etched.step/tps73630dcqr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps73630dcqr.step/tps73630dcqr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (49 pp, sha256
5ed5c95a399b519d, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).