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STM32F750V8T6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32f750v8t6factory-2.0.0extractor-text
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Symbol & Footprint

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Datasheet

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Contents

README

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STM32F750V8T6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32F750V8T6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional GPIO port E pin 2; alternate functions: TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, ETH_MII_TXD3, FMC_A23, EVENTOUT.
2 PE3 bidirectional GPIO port E pin 3; alternate functions: TRACED0, SAI1_SD_B, FMC_A19, EVENTOUT.
3 PE4 bidirectional GPIO port E pin 4; alternate functions: TRACED1, SPI4_NSS, SAI1_FS_A, FMC_A20, DCMI_D4, LCD_B0, EVENTOUT.
4 PE5 bidirectional GPIO port E pin 5; alternate functions: TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, FMC_A21, DCMI_D6, LCD_G0, EVENTOUT.
5 PE6 bidirectional GPIO port E pin 6; alternate functions: TRACED3, TIM1_BKIN2, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, SAI2_MCK_B, FMC_A22, DCMI_D7, LCD_G1, EVENTOUT.
6 VBAT power_in Backup battery supply voltage (1.65 V to 3.6 V) for RTC, backup registers, and backup SRAM in low-power modes.
7 PC13 bidirectional GPIO port C pin 13 (anti-tamper); alternate functions: EVENTOUT, RTC_TAMP1, RTC_TS, RTC_OUT, wakeup source 4 with 3 mA max sink current.
8 PC14 bidirectional GPIO port C pin 14 (OSC32_IN); alternate functions: EVENTOUT, OSC32_IN for 32 kHz oscillator input with 3 mA max sink current.
9 PC15 bidirectional GPIO port C pin 15 (OSC32_OUT); alternate functions: EVENTOUT, OSC32_OUT for 32 kHz oscillator output with 3 mA max sink current.
10 VSS power_in Ground (reference potential 0 V).
11 VDD power_in Main power supply (1.7 V to 3.6 V) for digital core and I/O logic.
12 PH0 bidirectional GPIO port H pin 0 (OSC_IN); alternate functions: EVENTOUT, OSC_IN for 4-26 MHz crystal oscillator; not 5V tolerant in oscillator mode.
13 PH1 bidirectional GPIO port H pin 1 (OSC_OUT); alternate functions: EVENTOUT, OSC_OUT for crystal oscillator; not 5V tolerant in oscillator mode.
14 NRST bidirectional Active-low reset input/output with internal weak pull-up (Schmitt trigger input); can be driven externally or by chip reset controller.
15 PC0 bidirectional GPIO port C pin 0; alternate functions: SAI2_FS_B, OTG_HS_ULPI_STP, FMC_SDNWE, LCD_R5, EVENTOUT; ADC123 channel 10.
16 PC1 bidirectional GPIO port C pin 1; alternate functions: TRACED0, SPI2_MOSI, SAI1_SD_A, ETH_MDC, EVENTOUT; ADC123 channel 11, RTC_TAMP3, wakeup source 3.
17 PC2 bidirectional GPIO port C pin 2; alternate functions: SPI2_MISO, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0, EVENTOUT; ADC123 channel 12.
18 PC3 bidirectional GPIO port C pin 3; alternate functions: SPI2_MOSI, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0, EVENTOUT; ADC123 channel 13.
19 VSSA power_in Ground reference for analog circuits and ADC/DAC (1.65 V to 3.6 V range).
20 VREF+ power_in Positive reference voltage for ADC (1.65 V to 3.6 V, typically VDDA); requires low-impedance decoupling capacitor.
21 VDDA power_in Analog power supply (1.65 V to 3.6 V) for ADC, DAC, comparators, and PLL; requires decoupling capacitor.
22 PA0 bidirectional GPIO port A pin 0 (WKUP); alternate functions: TIM2_CH1, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, SAI2_SD_B, ETH_MII_CRS, EVENTOUT; ADC123 channel 0, wakeup source 1.
23 PA1 bidirectional GPIO port A pin 1; alternate functions: TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, SAI2_MCK_B, ETH_MII_RX_CLK, LCD_R2, EVENTOUT; ADC123 channel 1.
24 PA2 bidirectional GPIO port A pin 2; alternate functions: TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, SAI2_SCK_B, ETH_MDIO, LCD_R1, EVENTOUT; ADC123 channel 2, wakeup source 2.
25 PA3 bidirectional GPIO port A pin 3; alternate functions: TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5, EVENTOUT; ADC123 channel 3.
26 VSS power_in Ground (reference potential 0 V).
27 VDD power_in Main power supply (1.7 V to 3.6 V) for digital core and I/O logic.
28 PA4 bidirectional GPIO port A pin 4 (TTL input); alternate functions: SPI1_NSS, SPI3_NSS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC, EVENTOUT; ADC12 channel 4, DAC output 1.
29 PA5 bidirectional GPIO port A pin 5 (TTL input); alternate functions: TIM2_CH1, TIM8_CH1N, SPI1_SCK, OTG_HS_ULPI_CK, LCD_R4, EVENTOUT; ADC12 channel 5, DAC output 2.
30 PA6 bidirectional GPIO port A pin 6; alternate functions: TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM13_CH1, DCMI_PIXCLK, LCD_G2, EVENTOUT; ADC12 channel 6.
31 PA7 bidirectional GPIO port A pin 7; alternate functions: TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM14_CH1, ETH_MII_RX_DV, FMC_SDNWE, EVENTOUT; ADC12 channel 7.
32 PC4 bidirectional GPIO port C pin 4; alternate functions: I2S1_MCK, SPDIFRX_IN2, ETH_MII_RXD0, FMC_SDNE0, EVENTOUT; ADC12 channel 14.
33 PC5 bidirectional GPIO port C pin 5; alternate functions: SPDIFRX_IN3, ETH_MII_RXD1, FMC_SDCKE0, EVENTOUT; ADC12 channel 15.
34 PB0 bidirectional GPIO port B pin 0; alternate functions: TIM1_CH2N, TIM3_CH3, TIM8_CH2N, UART4_CTS, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2, EVENTOUT; ADC12 channel 8.
35 PB1 bidirectional GPIO port B pin 1; alternate functions: TIM1_CH3N, TIM3_CH4, TIM8_CH3N, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3, EVENTOUT; ADC12 channel 9.
36 PB2 bidirectional GPIO port B pin 2; alternate functions: SAI1_SD_A, SPI3_MOSI, QUADSPI_CLK, EVENTOUT.
37 PE7 bidirectional GPIO port E pin 7; alternate functions: TIM1_ETR, UART7_RX, QUADSPI_BK2_IO0, FMC_D4, EVENTOUT.
38 PE8 bidirectional GPIO port E pin 8; alternate functions: TIM1_CH1N, UART7_TX, QUADSPI_BK2_IO1, FMC_D5, EVENTOUT.
39 PE9 bidirectional GPIO port E pin 9; alternate functions: TIM1_CH1, UART7_RTS, QUADSPI_BK2_IO2, FMC_D6, EVENTOUT.
40 PE10 bidirectional GPIO port E pin 10; alternate functions: TIM1_CH2N, UART7_CTS, QUADSPI_BK2_IO3, FMC_D7, EVENTOUT.
41 PE11 bidirectional GPIO port E pin 11; alternate functions: TIM1_CH2, SPI4_NSS, SAI2_SD_B, FMC_D8, LCD_G3, EVENTOUT.
42 PE12 bidirectional GPIO port E pin 12; alternate functions: TIM1_CH3N, SPI4_SCK, SAI2_SCK_B, FMC_D9, LCD_B4, EVENTOUT.
43 PE13 bidirectional GPIO port E pin 13; alternate functions: TIM1_CH3, SPI4_MISO, SAI2_FS_B, FMC_D10, LCD_DE, EVENTOUT.
44 PE14 bidirectional GPIO port E pin 14; alternate functions: TIM1_CH4, SPI4_MOSI, SAI2_MCK_B, FMC_D11, LCD_CLK, EVENTOUT.
45 PE15 bidirectional GPIO port E pin 15; alternate functions: TIM1_BKIN, FMC_D12, LCD_R7, EVENTOUT.
46 PB10 bidirectional GPIO port B pin 10; alternate functions: TIM2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4, EVENTOUT.
47 PB11 bidirectional GPIO port B pin 11; alternate functions: TIM2_CH4, I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN, LCD_G5, EVENTOUT.
48 VCAP1 passive Capacitor decoupling pin for internal voltage regulator (1.0 V supply); connect to external capacitor (typically 2.2 µF or 10 µF).
49 VSS power_in Ground (reference potential 0 V).
50 VDD power_in Main power supply (1.7 V to 3.6 V) for digital core and I/O logic.
51 PB12 bidirectional GPIO port B pin 12; alternate functions: TIM1_BKIN, I2C2_SMBA, SPI2_NSS, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0, OTG_HS_ID, EVENTOUT.
52 PB13 bidirectional GPIO port B pin 13; alternate functions: TIM1_CH1N, SPI2_SCK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1, EVENTOUT; OTG_HS_VBUS available.
53 PB14 bidirectional GPIO port B pin 14; alternate functions: TIM1_CH2N, TIM8_CH2N, SPI2_MISO, USART3_RTS, TIM12_CH1, OTG_HS_DM, EVENTOUT.
54 PB15 bidirectional GPIO port B pin 15; alternate functions: RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI, TIM12_CH2, OTG_HS_DP, EVENTOUT.
55 PD8 bidirectional GPIO port D pin 8; alternate functions: USART3_TX, SPDIFRX_IN11, FMC_D13, EVENTOUT.
56 PD9 bidirectional GPIO port D pin 9; alternate functions: USART3_RX, FMC_D14, EVENTOUT.
57 PD10 bidirectional GPIO port D pin 10; alternate functions: USART3_CK, FMC_D15, LCD_B3, EVENTOUT.
58 PD11 bidirectional GPIO port D pin 11; alternate functions: I2C4_SMBA, USART3_CTS, QUADSPI_BK1_IO0, SAI2_SD_A, FMC_A16/CLE, EVENTOUT.
59 PD12 bidirectional GPIO port D pin 12; alternate functions: TIM4_CH1, LPTIM1_IN1, I2C4_SCL, USART3_RTS, QUADSPI_BK1_IO1, SAI2_FS_A, FMC_A17/ALE, EVENTOUT.
60 PD13 bidirectional GPIO port D pin 13; alternate functions: TIM4_CH2, LPTIM1_OUT, I2C4_SDA, QUADSPI_BK1_IO3, SAI2_SCK_A, FMC_A18, EVENTOUT.
61 PD14 bidirectional GPIO port D pin 14; alternate functions: TIM4_CH3, UART8_CTS, FMC_D0, EVENTOUT.
62 PD15 bidirectional GPIO port D pin 15; alternate functions: TIM4_CH4, UART8_RTS, FMC_D1, EVENTOUT.
63 PC6 bidirectional GPIO port C pin 6; alternate functions: TIM3_CH1, TIM8_CH1, I2S2_MCK, USART6_TX, SDMMC1_D6, DCMI_D0, LCD_HSYNC, EVENTOUT.
64 PC7 bidirectional GPIO port C pin 7; alternate functions: TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, SDMMC1_D7, DCMI_D1, LCD_G6, EVENTOUT.
65 PC8 bidirectional GPIO port C pin 8; alternate functions: TRACED1, TIM3_CH3, TIM8_CH3, UART5_RTS, USART6_CK, SDMMC1_D0, DCMI_D2, EVENTOUT.
66 PC9 bidirectional GPIO port C pin 9; alternate functions: MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, UART5_CTS, QUADSPI_BK1_IO0, SDMMC1_D1, DCMI_D3, EVENTOUT.
67 PA8 bidirectional GPIO port A pin 8; alternate functions: MCO1, TIM1_CH1, TIM8_BKIN2, I2C3_SCL, USART1_CK, OTG_FS_SOF, LCD_R6, EVENTOUT.
68 PA9 bidirectional GPIO port A pin 9; alternate functions: TIM1_CH2, I2C3_SMBA, SPI2_SCK, USART1_TX, DCMI_D0, EVENTOUT; OTG_FS_VBUS available.
69 PA10 bidirectional GPIO port A pin 10; alternate functions: TIM1_CH3, USART1_RX, OTG_FS_ID, DCMI_D1, EVENTOUT.
70 PA11 bidirectional GPIO port A pin 11; alternate functions: TIM1_CH4, USART1_CTS, CAN1_RX, OTG_FS_DM, LCD_R4, EVENTOUT.
71 PA12 bidirectional GPIO port A pin 12; alternate functions: TIM1_ETR, USART1_RTS, SAI2_FS_B, CAN1_TX, OTG_FS_DP, LCD_R5, EVENTOUT.
72 PA13 bidirectional GPIO port A pin 13 (JTMS-SWDIO); alternate functions: JTMS-SWDIO, EVENTOUT; dedicated JTAG/SWD debug port pin.
73 VCAP2 passive Capacitor decoupling pin for internal voltage regulator (1.0 V supply); connect to external capacitor (typically 2.2 µF or 10 µF).
74 VSS power_in Ground (reference potential 0 V).
75 VDD power_in Main power supply (1.7 V to 3.6 V) for digital core and I/O logic.
76 PA14 bidirectional GPIO port A pin 14 (JTCK-SWCLK); alternate functions: JTCK-SWCLK, EVENTOUT; dedicated JTAG/SWD debug port pin.
77 PA15 bidirectional GPIO port A pin 15 (JTDI); alternate functions: JTDI, TIM2_CH1, HDMI-CEC, SPI1_NSS, SPI3_NSS, UART4_RTS, EVENTOUT; JTAG debug pin.
78 PC10 bidirectional GPIO port C pin 10; alternate functions: SPI3_SCK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDMMC1_D2, DCMI_D8, LCD_R2, EVENTOUT.
79 PC11 bidirectional GPIO port C pin 11; alternate functions: SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDMMC1_D3, DCMI_D4, EVENTOUT.
80 PC12 bidirectional GPIO port C pin 12; alternate functions: TRACED3, SPI3_MOSI, USART3_CK, UART5_TX, SDMMC1_CK, DCMI_D9, EVENTOUT.
81 PD0 bidirectional GPIO port D pin 0; alternate functions: CAN1_RX, FMC_D2, EVENTOUT.
82 PD1 bidirectional GPIO port D pin 1; alternate functions: CAN1_TX, FMC_D3, EVENTOUT.
83 PD2 bidirectional GPIO port D pin 2; alternate functions: TRACED2, TIM3_ETR, UART5_RX, SDMMC1_CMD, DCMI_D11, EVENTOUT.
84 PD3 bidirectional GPIO port D pin 3; alternate functions: SPI2_SCK, USART2_CTS, FMC_CLK, DCMI_D5, LCD_G7, EVENTOUT.
85 PD4 bidirectional GPIO port D pin 4; alternate functions: USART2_RTS, FMC_NOE, EVENTOUT.
86 PD5 bidirectional GPIO port D pin 5; alternate functions: USART2_TX, FMC_NWE, EVENTOUT.
87 PD6 bidirectional GPIO port D pin 6; alternate functions: SPI3_MOSI, SAI1_SD_A, USART2_RX, FMC_NWAIT, DCMI_D10, LCD_B2, EVENTOUT.
88 PD7 bidirectional GPIO port D pin 7; alternate functions: USART2_CK, SPDIFRX_IN0, FMC_NE1, EVENTOUT.
89 PB3 bidirectional GPIO port B pin 3 (JTDO/TRACESWO); alternate functions: JTDO/TRACESWO, TIM2_CH2, SPI1_SCK, SPI3_SCK, EVENTOUT; JTAG debug pin.
90 PB4 bidirectional GPIO port B pin 4 (NJTRST); alternate functions: NJTRST, TIM3_CH1, SPI1_MISO, SPI3_MISO, SPI2_NSS, EVENTOUT; JTAG debug pin.
91 PB5 bidirectional GPIO port B pin 5; alternate functions: TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1, DCMI_D10, EVENTOUT.
92 PB6 bidirectional GPIO port B pin 6; alternate functions: TIM4_CH1, HDMI-CEC, I2C1_SCL, USART1_TX, CAN2_TX, QUADSPI_BK1_NCS, FMC_SDNE1, DCMI_D5, EVENTOUT.
93 PB7 bidirectional GPIO port B pin 7; alternate functions: TIM4_CH2, I2C1_SDA, USART1_RX, FMC_NL, DCMI_VSYNC, EVENTOUT.
94 BOOT0 input Boot mode selection pin (pull to VDD for boot from memory, leave floating or ground for boot from flash); sampled during reset.
95 PB8 bidirectional GPIO port B pin 8; alternate functions: TIM4_CH3, TIM10_CH1, I2C1_SCL, CAN1_RX, ETH_MII_TXD3, SDMMC1_D4, DCMI_D6, LCD_B6, EVENTOUT.
96 PB9 bidirectional GPIO port B pin 9; alternate functions: TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS, CAN1_TX, SDMMC1_D5, DCMI_D7, LCD_B7, EVENTOUT.
97 PE0 bidirectional GPIO port E pin 0; alternate functions: TIM4_ETR, LPTIM1_ETR, UART8_RX, SAI2_MCK_A, FMC_NBL0, DCMI_D2, EVENTOUT.
98 PE1 bidirectional GPIO port E pin 1; alternate functions: LPTIM1_IN2, UART8_TX, FMC_NBL1, DCMI_D3, EVENTOUT.
99 VSS power_in Ground (reference potential 0 V).
100 VDD power_in Main power supply (1.7 V to 3.6 V) for digital core and I/O logic.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32F750V8T6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32f750v8t6-etched.step / stm32f750v8t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f750v8t6.step / stm32f750v8t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (199 pp, sha256 b2a69a47a26f41f0, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF