component
AUIR3241STR
Public Made by Adomby adom
Infineon Technologies Gate Drive ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAUIR3241STR
Infineon Technologies · Gate Drive ICs · SOIC-8
AUIR3241STR from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Input pin; active high and 3.3V compatible, with VIH of 2.5 to 5.5V and VIL of 0 to 0.8V. |
| 2 | GND | power_in | Ground pin; Vin-gnd maximum is -0.3V to Vout+0.3V and Vcc-gnd maximum is -0.3V to 65V. |
| 3 | RS | input | Current sense input pin; the 1V comparator limits inductor current via the Rs threshold Vrs th of 0.8 to 1.3V. |
| 4 | SW | output | Output of K1; maximum continuous current in the Sw pin is 200 mA. |
| 5 | Source | passive | Connection of the source pin of the Mosfets. |
| 6 | Gate | output | Output of the gate driver; Vgate is at least 11.5V (Vout_th-related gate drive), and the minimum gate resistor Rg is 100 Ohm. |
| 7 | Vcc | power_in | Power supply; operating voltage range is 3 to 36V, with nominal operation specified from 6 to 16V. |
| 8 | Out | power_out | Output of the boost converter; Vout-Vcc maximum voltage is 65V per the absolute maximum ratings. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Maximum Vcc voltage | Vcc-gnd | -0.3 | 65 | V | 4 | ||
| Maximum Sw voltage | Vsw-Vrs | -0.3 | 65 | V | 4 | ||
| Maximum Vout-Vcc voltage | Vout-Vcc | -0.3 | 65 | V | 4 | ||
| Maximum Vout voltage | Vout-gnd | -0.3 | 65 | V | 4 | ||
| Maximum Vout-Vgate voltage | Vout-Vgate | -0.3 | 65 | V | 4 | ||
| Maximum Vgate-Vsource voltage | Vgate-Vsource | -0.3 | 75 | V | 4 | ||
| Maximum Vout-Vsource voltage | Vout-Vsource | -0.3 | 75 | V | 4 | ||
| Maximum Rs pin voltage | Vrs-gnd | -0.3 | 6 | V | 4 | ||
| Maximum continuous current in Sw pin | Isw | 200 | mA | 4 | |||
| Maximum continuous current in the rectifier diode | ID | 200 | 4 | ||||
| Minimum gate resistor | Rg | 100 | Ohm | 4 | |||
| Maximum operating junction temperature | Tj max. | -40 | 150 | °C | 4 | ||
| Maximum storage temperature | -55 | 150 | °C | 4 | |||
| High level input voltage | VIH | 2.5 | 5.5 | V | 4 | ||
| Low level input voltage | VIL | 0 | 0.8 | V | 4 | ||
| Supply voltage range for extended operation (some parameters may be downgraded beyond nominal operation) | Vcc op (ext). | 3 | 36 | V | See page 11 | 5 | |
| Supply voltage range for nominal operation | Vcc op (nom). | 6 | 16 | V | 5 | ||
| Supply current when Off | Iq Vcc Off | 2 | 6 | µA | Tj=25°C; Vin=0V,K1/K2 off, K3 on, Vout-Vcc=14V | 5 | |
| Supply current when Off | Iq Vcc Off | 3 | 8 | µA | Tj=125°C; Vin=0V,K1/K2 off, K3 on, Vout-Vcc=14V | 5 | |
| Supply current when On | Iq Vcc On | 3 | 6 | µA | Tj=25°C; Vin=5V,K1/K3 off, K2 on, Vout-Vcc=14V | 5 | |
| Supply current when On | Iq Vcc On | 4 | 8 | µA | Tj=125°C; Vin=5V,K1/K3 off, K2 on, Vout-Vcc=14V | 5 | |
| Quiescent current on Out pin | Iq Out Off | 10 | 15 | µA | Tj=25°C; Vin=0V,K1/K2 off, K3 on, Vout-Vcc=14V | 5 | |
| Quiescent current on Out pin | Iq Out Off | 13 | 25 | µA | Tj=125°C; Vin=0V,K1/K2 off, K3 on, Vout-Vcc=14V | 5 | |
| Quiescent current on Out pin | Iq Out On | 12 | 20 | µA | Tj=25°C; Vin=5V,K1/K3 off, K2 on, Vout-Vcc=14V | 5 | |
| Quiescent current on Out pin | Iq Out On | 15 | 30 | µA | Tj=125°C; Vin=5V,K1/K3 off, K2 on, Vout-Vcc=14V | 5 | |
| Breakdown voltage between Out and Source | Vbr Out | 75 | 90 | V | I=10mA | 5 | |
| Breakdown voltage between Gate and Source | Vbr Gate | 75 | 90 | V | I=10mA | 5 | |
| Over-voltage protection between Vout and Gnd | OV | 50 | 55 | 62 | V | 5 | |
| Input current | Iin | 3 | 6 | µA | Vin=5V | 5 | |
| Input voltage threshold | Vin_th | 0.8 | 1.5 | 2.5 | V | 5 | |
| Output voltage threshold | Vout_th | 11.5 | 12.5 | 14 | V | 5 | |
| Undervoltage lockout between Vout and Vcc | UV_LO | 6.5 | 8 | 10 | V | See figure 7 | 5 |
| Output voltage minus Undervoltage lockout threshold | Vout_th-UV_LO | 3 | 4.5 | V | 5 | ||
| Under voltage lockout Latch current between Vout and Vcc | I latch UV_LO | 10 | 25 | 40 | mA | See page 11 | 5 |
| Rs threshold | Vrs th | 0.8 | 1 | 1.3 | V | 5 | |
| Forward voltage of rectifier diode | Vf | 0.9 | 1.1 | V | I=100mA, Tj=25°C | 5 | |
| Rdson of K1 | Rdson K1 | 8 | 13 | Tj=-40°C; I=100mA, Vout-Vcc=12.5V | 5 | ||
| Rdson of K1 | Rdson K1 | 11 | 15 | Tj=25°C; I=100mA, Vout-Vcc=12.5V | 5 | ||
| Rdson of K1 | Rdson K1 | 15 | 20 | Tj=125°C; I=100mA, Vout-Vcc=12.5V | 5 | ||
| Off time | Toff | 2 | 3 | 4 | µs | See figure 4 | 5 |
| Power On Reset delay | POR_Delay | 200 | 500 | 1200 | See figure 10 | 5 | |
| Power On Reset threshold | POR_Th | 6 | 6.5 | 7.5 | V | 5 | |
| Gate turn-on delay | Tdon gate | 0.5 | 1.5 | 3 | µs | 5 | |
| Rise time on gate 10% to 90% of Vout-Vcc | Tr gate | 6 | 15 | µs | Cgate=100nF | 5 | |
| Gate high short circuit pulsed current | Igate+ | 100 | 350 | mA | Vgate-Vsource=0V | 5 | |
| Gate turn-off delay | Tdoff gate | 0.5 | 2 | 5 | µs | 5 | |
| Fall time on gate 90% to 10% of Vout-Vcc | Tf gate | 6 | 15 | µs | Cgate=100nF | 5 | |
| Gate low short circuit pulsed current | Igate- | 100 | 350 | mA | Vgate-Vsource=14V | 5 | |
| Time to reset the under voltage latches | Treset | 1 | 100 | µs | See page 11 | 5 | |
| Thermal resistance junction to ambient | Rth | 100 | °C/W | 4 | |||
| Rdson of K2 | Rdson K2 | 25 | Tj=25°C; I=100mA | 5 | |||
| Rdson of K3 | Rdson K3 | 25 | Tj=25°C | 5 | |||
| Turn-on delay of K1 | Tdon K1 | 5 | µs | See figure 5 | 5 | ||
| Turn-off delay of K1 | Tdoff K1 | 0.2 | µs | See figure 5 | 5 |
CAD (KiCad official)
- Symbol:
AUIR3241STR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
auir3241str-etched.step/auir3241str-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);auir3241str.step/auir3241str.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (19 pp, sha256
1bfe72317598b374, retrieved 2026-10-28, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).