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Contents

README

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ATMEGA32U4-MU

Microchip Tech · Microcontrollers (MCU/MPU/SOC) · VQFN-44-EP(7x7)

ATMEGA32U4-MU from Microchip Tech, in a VQFN-44-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE6 bidirectional Port E bit 6 bi-directional I/O with internal pull-up; alternate functions INT.6 and AIN0 (analog comparator input).
2 UVCC power_in USB pads internal regulator input supply voltage.
3 D- bidirectional USB full/low speed negative data upstream port; connect to the USB D- connector pin with a serial 22 ohm resistor.
4 D+ bidirectional USB full/low speed positive data upstream port; connect to the USB D+ connector pin with a serial 22 ohm resistor.
5 UGND power_in USB pads ground.
6 UCAP power_out USB pads internal regulator output supply voltage; connect to an external 1 uF capacitor.
7 VBUS power_in USB VBUS monitor input.
8 PB0 bidirectional Port B bit 0 bi-directional I/O with internal pull-up; alternate functions SS and PCINT0.
9 PB1 bidirectional Port B bit 1 bi-directional I/O with internal pull-up; alternate functions SCLK (SPI clock) and PCINT1.
10 PB2 bidirectional Port B bit 2 bi-directional I/O with internal pull-up; alternate functions MOSI, PDI and PCINT2.
11 PB3 bidirectional Port B bit 3 bi-directional I/O with internal pull-up; alternate functions MISO, PDO and PCINT3.
12 PB7 bidirectional Port B bit 7 bi-directional I/O with internal pull-up; alternate functions PCINT7, OC0A, OC1C and RTS.
13 RESET input Active-low reset input; a low level longer than the minimum pulse length generates a reset even if the clock is not running.
14 VCC power_in Digital supply voltage.
15 GND power_in Ground.
16 XTAL2 output Output from the inverting oscillator amplifier.
17 XTAL1 input Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
18 PD0 bidirectional Port D bit 0 bi-directional I/O with internal pull-up; alternate functions OC0B, SCL and INT0.
19 PD1 bidirectional Port D bit 1 bi-directional I/O with internal pull-up; alternate functions SDA and INT1.
20 PD2 bidirectional Port D bit 2 bi-directional I/O with internal pull-up; alternate functions RXD1 and INT2.
21 PD3 bidirectional Port D bit 3 bi-directional I/O with internal pull-up; alternate functions TXD1 and INT3.
22 PD5 bidirectional Port D bit 5 bi-directional I/O with internal pull-up; alternate functions XCK1 and CTS.
23 GND power_in Ground.
24 AVCC power_in Supply voltage for the A/D converter channels; connect to VCC if the ADC is unused, or through a low-pass filter if used.
25 PD4 bidirectional Port D bit 4 bi-directional I/O with internal pull-up; alternate functions ICP1 and ADC8.
26 PD6 bidirectional Port D bit 6 bi-directional I/O with internal pull-up; alternate functions T1, OC4D (inverted) and ADC9.
27 PD7 bidirectional Port D bit 7 bi-directional I/O with internal pull-up; alternate functions T0, OC4D and ADC10.
28 PB4 bidirectional Port B bit 4 bi-directional I/O with internal pull-up; alternate functions PCINT4 and ADC11.
29 PB5 bidirectional Port B bit 5 bi-directional I/O with internal pull-up; alternate functions PCINT5, OC1A and OC4B (inverted), plus an ADC input.
30 PB6 bidirectional Port B bit 6 bi-directional I/O with internal pull-up; alternate functions PCINT6, OC1B and OC4B, plus an ADC input.
31 PC6 bidirectional Port C bit 6 bi-directional I/O with internal pull-up; alternate functions OC3A and OC4A (inverted).
32 PC7 bidirectional Port C bit 7 bi-directional I/O with internal pull-up; alternate functions ICP3, CLK0 and OC4A.
33 PE2 bidirectional Port E bit 2 bi-directional I/O with internal pull-up; alternate function HWB (active-low).
34 VCC power_in Digital supply voltage.
35 GND power_in Ground.
36 PF7 bidirectional Port F bit 7 ADC7 analog input or I/O; JTAG TDI, pull-up active when JTAG is enabled even during reset.
37 PF6 bidirectional Port F bit 6 ADC6 analog input or I/O; JTAG TDO.
38 PF5 bidirectional Port F bit 5 ADC5 analog input or I/O; JTAG TMS, pull-up active when JTAG is enabled even during reset.
39 PF4 bidirectional Port F bit 4 ADC4 analog input or I/O; JTAG TCK, pull-up active when JTAG is enabled even during reset.
40 PF1 bidirectional Port F bit 1 ADC1 analog input or I/O.
41 PF0 bidirectional Port F bit 0 ADC0 analog input or I/O.
42 AREF input Analog reference input for the A/D converter.
43 GND power_in Ground.
44 AVCC power_in Supply voltage for the A/D converter channels; connect to VCC if the ADC is unused, or through a low-pass filter if used.
45 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package VQFN-44-EP(7x7)
Category Embedded Processors & Controllers
Pins 45

CAD (KiCad official)

  • Symbol: ATMEGA32U4-MU
  • Footprint: Package_DFN_QFN:QFN-44-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: VQFN-44-EP(7x7) (KiCad packages3D, STEP)
  • 3D model files: atmega32u4-mu-etched.step / atmega32u4-mu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega32u4-mu.step / atmega32u4-mu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (27 pp, sha256 65cd582b7eceee5f, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF