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SN74AUC1G00DCKR

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Texas Instruments Logic Gates, SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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SN74AUC1G00DCKR

Texas Instruments · Logic Gates · SC-70-5

SN74AUC1G00DCKR from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Gate input A, which accepts 0 V to 3.6 V and must be tied to VCC or GND when unused.
2 B input Gate input B, which accepts 0 V to 3.6 V and must be tied to VCC or GND when unused.
3 GND power_in Ground reference for the device.
4 Y output NAND output Y = A·B inverted, driving up to 8 mA at VCC = 1.65 V and swinging 0 V to VCC.
5 VCC power_in Supply voltage pin, recommended operating range 0.8 V to 2.7 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SC-70-5
Category Logic
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 0.8 2.7 V 3
High-level input voltage VIH 1.7 V VCC = 2.3 V to 2.7 V 3
Low-level input voltage VIL 0.7 V VCC = 2.3 V to 2.7 V 3
Low-level input voltage VIL 0 V VCC = 0.8 V 3
Input voltage VI 0 3.6 V 3
Output voltage VO 0 V 3
High-level output current IOH -0.7 mA VCC = 0.8 V 3
High-level output current IOH -3 mA VCC = 1.1 V 3
High-level output current IOH -5 mA VCC = 1.4 V 3
High-level output current IOH -8 mA VCC = 1.65 V 3
High-level output current IOH -9 mA VCC = 2.3 V 3
Low-level output current IOL 0.7 mA VCC = 0.8 V 3
Low-level output current IOL 3 mA VCC = 1.1 V 3
Low-level output current IOL 5 mA VCC = 1.4 V 3
Low-level output current IOL 8 mA VCC = 1.65 V 3
Low-level output current IOL 9 mA VCC = 2.3 V 3
Input transition rise or fall rate ∆t/∆v 20 ns/V VCC = 0.8 V to 1.95 V 3
Input transition rise or fall rate ∆t/∆v 10 ns/V VCC = 2.3 V to 2.7 V 3
Operating free-air temperature TA -40 85 °C 3
Supply voltage range VCC -0.5 3.6 V 2
Input voltage range VI -0.5 3.6 V 2
Voltage range applied to any output in the high-impedance or power-off state VO -0.5 3.6 V high-impedance or power-off state 2
Output voltage range VO -0.5 V 2
Input clamp current IIK -50 mA VI < 0 2
Output clamp current IOK -50 mA VO < 0 2
Continuous output current IO -20 20 mA 2
Continuous current through VCC or GND -100 100 mA 2
Storage temperature range Tstg -65 150 °C 2
High-level output voltage VOH 0.55 V IOH = -0.7 mA, VCC = 0.8 V 3
High-level output voltage VOH 0.8 V IOH = -3 mA, VCC = 1.1 V 3
High-level output voltage VOH 1 V IOH = -5 mA, VCC = 1.4 V 3
High-level output voltage VOH 1.2 V IOH = -8 mA, VCC = 1.65 V 3
High-level output voltage VOH 1.8 V IOH = -9 mA, VCC = 2.3 V 3
Low-level output voltage VOL 0.2 V IOL = 100 µA, VCC = 0.8 V to 2.7 V 3
Low-level output voltage VOL 0.25 V IOL = 0.7 mA, VCC = 0.8 V 3
Low-level output voltage VOL 0.3 V IOL = 3 mA, VCC = 1.1 V 3
Low-level output voltage VOL 0.4 V IOL = 5 mA, VCC = 1.4 V 3
Low-level output voltage VOL 0.45 V IOL = 8 mA, VCC = 1.65 V 3
Low-level output voltage VOL 0.6 V IOL = 9 mA, VCC = 2.3 V 3
Input leakage current II -5 5 µA A or B input, VI = VCC or GND, 0 to 2.7 V 3
Power-off leakage current Ioff -10 10 µA VI or VO = 2.7 V 3
Quiescent supply current ICC 10 µA VI = VCC or GND, IO = 0; VCC 0.8 V to 2.7 V 3
Propagation delay A or B to Y tpd 0.9 3.2 ns CL = 15 pF, VCC = 1.2 V ±0.1 V 4
Propagation delay A or B to Y tpd 0.5 2.2 ns CL = 15 pF, VCC = 1.5 V ±0.1 V 4
Propagation delay A or B to Y tpd 0.5 0.9 1.6 ns CL = 15 pF, VCC = 1.8 V ±0.15 V 4
Propagation delay A or B to Y tpd 0.3 1.4 ns CL = 15 pF, VCC = 2.5 V ±0.2 V 4
Propagation delay A or B to Y tpd 0.7 1.3 2.2 ns CL = 30 pF, VCC = 1.8 V ±0.15 V 4
Propagation delay A or B to Y tpd 0.5 2 ns CL = 30 pF, VCC = 2.5 V ±0.2 V 4
Propagation delay A or B to Y tpd 4.7 ns CL = 15 pF, VCC = 0.8 V 4
Input capacitance Ci 3 pF VI = VCC or GND, VCC = 2.5 V 3
Power dissipation capacitance Cpd 15 pF f = 10 MHz, VCC = 0.8 V 4
Package thermal impedance (DCK package) θJA 252 °C/W DCK package 2

CAD (KiCad official)

  • Symbol: SN74AUC1G00DCKR
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SC-70-5 (KiCad packages3D, STEP)
  • 3D model files: sn74auc1g00dckr-etched.step / sn74auc1g00dckr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74auc1g00dckr.step / sn74auc1g00dckr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (22 pp, sha256 41e0848cbd45981f, retrieved 2026-10-21, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF