STB12NM50T4 from STMicroelectronics, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	G	input	Gate of the N-channel MOSFET; gate-source voltage is rated at ±30 V (VGS).
2	D	passive	Drain, also connected to the TAB; continuous drain current is 12 A at TC = 25 °C with VDSS of 500 V.
3	S	passive	Source of the N-channel MOSFET, the reference for the gate-source voltage rating of ±30 V.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	D2PAK
Category	Transistors/Thyristors
Pins	3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Gate-source voltage	VGS	-30		30	V		2
Drain current (continuous) at TC = 25 °C	ID			12	A	TC = 25 °C	2
Drain current (continuous) at TC = 100 °C	ID			7.5	A	TC = 100 °C	2
Drain current pulsed	IDM			48	A	Pulse width limited by safe operating area	2
Total power dissipation D2PAK	PTOT			160	W	TC = 25 °C	2
Insulation withstand voltage (RMS)	VISO			2.5	kV	From all three leads to external heat sink, t = 1 s, TC = 25 °C	2
Peak diode recovery voltage slope	dv/dt			15	V/ns	ISD ≤ 12 A, di/dt ≤ 400 A/μs, VDD = 80% V(BR)DSS	2
Operating junction temperature range	TJ	-65		150	°C		2
Drain-source breakdown voltage	V(BR)DSS	500			V	VGS = 0 V, ID = 250 μA	3
Zero gate voltage drain current	IDSS			1	µA	VGS = 0 V, VDS = 500 V	3
Zero gate voltage drain current at TC = 125 °C	IDSS			10	µA	VGS = 0 V, VDS = 500 V, TC = 125 °C (specified by design, not tested in production)	3
Gate-body leakage current	IGSS	-100		100	nA	VDS = 0 V, VGS = ±30 V	3
Gate threshold voltage	VGS(th)	3	4	5	V	VDS = VGS, ID = 50 µA	3
Static drain-source on-resistance	RDS(on)		300	350	mΩ	VGS = 10 V, ID = 6 A	3
Input capacitance	Ciss		1000		pF	VDS = 25 V, f = 1 MHz, VGS = 0 V	3
Output capacitance	Coss		250		pF	VDS = 25 V, f = 1 MHz, VGS = 0 V	3
Reverse transfer capacitance	Crss		20		pF	VDS = 25 V, f = 1 MHz, VGS = 0 V	3
Equivalent output capacitance	Coss eq.		90		pF	VDS = 0 to 400 V, VGS = 0 V	3
Turn-on delay time	td(on)		20		ns	VDD = 250 V, ID = 6 A, RG = 4.7 Ω, VGS = 10 V	3
Rise time	tr		10		ns	VDD = 250 V, ID = 6 A, RG = 4.7 Ω, VGS = 10 V	3
Total gate charge	Qg		28		nC	VDD = 400 V, ID = 12 A, VGS = 0 to 10 V	3
Gate-source charge	Qgs		8		nC	VDD = 400 V, ID = 12 A, VGS = 0 to 10 V	3
Gate-drain charge	Qgd		16		nC	VDD = 400 V, ID = 12 A, VGS = 0 to 10 V	3
Gate input resistance	Rg		1.6		Ω	f = 1 MHz, gate DC bias = 0, test signal level = 20 mV, open drain	3
Source-drain current	ISD			12	A		4
Source-drain current (pulsed)	ISDM			48	A		4
Forward on voltage	VSD			1.5	V	VGS = 0 V, ISD = 12 A	4
Reverse recovery time	trr		270		ns	ISD = 12 A, di/dt = 100 A/µs, VDD = 100 V	4
Reverse recovery charge	Qrr		2.23		µC	ISD = 12 A, di/dt = 100 A/µs, VDD = 100 V	4
Reverse recovery current	IRRM		16.5		A	ISD = 12 A, di/dt = 100 A/µs, VDD = 100 V	4
Reverse recovery time at TJ = 150 °C	trr		340		ns	ISD = 12 A, di/dt = 100 A/µs, VDD = 100 V, TJ = 150 °C	4
Reverse recovery charge at TJ = 150 °C	Qrr		3		µC	ISD = 12 A, di/dt = 100 A/µs, VDD = 100 V, TJ = 150 °C	4
Reverse recovery current at TJ = 150 °C	IRRM		18		A	ISD = 12 A, di/dt = 100 A/µs, VDD = 100 V, TJ = 150 °C	4
Thermal resistance junction-to-case D2PAK	RthJC		2.78		°C/W		2
Thermal resistance junction-to-ambient D2PAK	RthJA		35		°C/W	Mounted on a standard 1 inch² area of FR-4 PCB with 2-oz copper	2

CAD (KiCad official)

Symbol: STB12NM50T4
Footprint: Package_TO_SOT_SMD:TO-263-2
3D model: D2PAK (KiCad packages3D, STEP)
3D model files: stb12nm50t4-etched.step / stb12nm50t4-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stb12nm50t4.step / stb12nm50t4.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (19 pp, sha256 c139da9d41accf86, retrieved 2026-11-05, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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STB12NM50T4

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