component
BQ25890RTWR
Public Made by Adomby adom
Texas Instruments Battery Management, WQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownBQ25890RTWR
Texas Instruments · Battery Management · WQFN-24-EP(4x4)
BQ25890RTWR from Texas Instruments, in a WQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBUS | power_in | Charger input voltage (3.9V to 14V) with integrated reverse-blocking MOSFET to PMID; place 1µF ceramic capacitor from VBUS to PGND close to IC. |
| 2 | D+ | bidirectional | USB data line positive for BC1.2 identification of charger type and adjustable high-voltage adapter detection. |
| 3 | D- | bidirectional | USB data line negative for BC1.2 identification of charger type and adjustable high-voltage adapter detection. |
| 4 | STAT | output | Open-drain charge status output pulled-HIGH externally; LOW indicates charging in progress, HIGH indicates charging complete or disabled. |
| 5 | SCL | input | I2C clock open-drain input; connect to logic rail (1.8V-3.3V) through 10kΩ pull-up resistor. |
| 6 | SDA | bidirectional | I2C data open-drain bidirectional line; connect to logic rail (1.8V-3.3V) through 10kΩ pull-up resistor. |
| 7 | INT | output | Open-drain interrupt output delivering active-LOW 256µs pulse for charger status changes and fault events; connect via 10kΩ pull-up. |
| 8 | OTG | input | Active-HIGH enable input for boost (OTG) mode; boost activates when OTG_CONFIG=1 and OTG pin HIGH. |
| 9 | CE | input | Active-LOW charge enable control input; charging enabled when CHG_CONFIG=1 and CE=LOW; must be pulled to logic level. |
| 10 | ILIM | input | Analog input for programmable input current limit; resistor from ILIM to GND sets maximum as IINMAX=KILIM/RILIM with 0.8V regulation threshold. |
| 11 | TS | input | Thermistor analog input for battery temperature monitoring with 103AT NTC thermistor; charge suspends outside configured temperature range. |
| 12 | QON | input | Battery FET control input with internal pull-up; LOW for 1s duration exits shipping mode, or LOW for 15s resets system when VBUS disconnected. |
| 13 | BAT | power_in | Battery positive terminal connection with integrated BATFET between BAT and SYS; place 10µF capacitor close to pin. |
| 14 | BAT | power_in | Battery positive terminal connection with integrated BATFET between BAT and SYS; place 10µF capacitor close to pin. |
| 15 | SYS | power_out | System output regulated above minimum voltage (3.0V-3.7V) by converter even with depleted battery; place 20µF capacitor close to pin. |
| 16 | SYS | power_out | System output regulated above minimum voltage (3.0V-3.7V) by converter even with depleted battery; place 20µF capacitor close to pin. |
| 17 | PGND | power_in | Power ground for high-current converter stages internally connected to LSFET source; connect directly to input/output capacitor grounds. |
| 18 | PGND | power_in | Power ground for high-current converter stages internally connected to LSFET source; connect directly to input/output capacitor grounds. |
| 19 | SW | output | PWM switching node connected to inductor output and LSFET source; place 0.047µF bootstrap capacitor from SW to BTST. |
| 20 | SW | output | PWM switching node connected to inductor output and LSFET source; place 0.047µF bootstrap capacitor from SW to BTST. |
| 21 | BTST | power_out | Bootstrap supply for high-side gate driver powered by internal bootstrap diode from SW node; connect 0.047µF bootstrap capacitor. |
| 22 | REGN | power_out | Internal LDO regulated output (5.6V-6.4V) powering gate drivers and TS bias; connect 4.7µF capacitor from REGN to analog GND close to IC. |
| 23 | PMID | output | Power management mid-point connected to RBFET drain and HSFET drain; place 1µF on VBUS-PGND and remaining input capacitance on PMID-PGND. |
| 24 | DSEL | output | Open-drain D+/D- detection multiplexer control output pulled-HIGH externally; driven LOW during D+/D- detection and held LOW for MaxCharge adapters. |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-24-EP(4x4) |
| Category | Power Management (PMIC) |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
BQ25890RTWR - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm - 3D model: WQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
bq25890rtwr-etched.step/bq25890rtwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);bq25890rtwr.step/bq25890rtwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (70 pp, sha256
2e8c133466478bb3, retrieved 2026-09-22, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).