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MCP4442-104E
Public Made by Adomby adom
Microchip Tech Digital Potentiometers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMCP4442-104E
Microchip Tech · Digital Potentiometers · TSSOP-14
MCP4442-104E from Microchip Tech, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P3W | passive | Potentiometer 3 wiper terminal; it has no polarity relative to terminals A or B, can carry positive or negative current, and must stay between VSS and VDD. |
| 2 | P3B | passive | Potentiometer 3 terminal B, the fixed zero-scale connection (wiper 0x00); it can carry positive or negative current and must stay between VSS and VDD. |
| 3 | HVC/A0 | input | I2C address bit A0, latched at POR/BOR, and the High Voltage Command pin, where a VIHH voltage selects a high-voltage command; the input is high-voltage tolerant with Schmitt trigger. |
| 4 | SCL | input | I2C serial clock input for a slave device, accepting only external clock signals; the input is high-voltage tolerant with Schmitt trigger. |
| 5 | SDA | bidirectional | I2C serial data I/O, implemented as an open-drain N-channel driver; the input is high-voltage tolerant with Schmitt trigger. |
| 6 | VSS | power_in | Device ground reference. |
| 7 | P1B | passive | Potentiometer 1 terminal B, the fixed zero-scale connection (wiper 0x00); it can carry positive or negative current and must stay between VSS and VDD. |
| 8 | P1W | passive | Potentiometer 1 wiper terminal; it can carry positive or negative current and must stay between VSS and VDD. |
| 9 | P0W | passive | Potentiometer 0 wiper terminal; it can carry positive or negative current and must stay between VSS and VDD. |
| 10 | P0B | passive | Potentiometer 0 terminal B, the fixed zero-scale connection (wiper 0x00); it can carry positive or negative current and must stay between VSS and VDD. |
| 11 | A1 | input | I2C address bit A1 which, together with A0, allows up to 4 MCP44XX devices on one I2C bus; the input is high-voltage tolerant with Schmitt trigger. |
| 12 | VDD | power_in | Positive power supply input, referenced to VSS; device electrical performance may not meet the datasheet specifications while VDD is below Vmin (2.7V). |
| 13 | P2B | passive | Potentiometer 2 terminal B, the fixed zero-scale connection (wiper 0x00); it can carry positive or negative current and must stay between VSS and VDD. |
| 14 | P2W | passive | Potentiometer 2 wiper terminal; it can carry positive or negative current and must stay between VSS and VDD. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-14 |
| Category | ADC/DAC/Data Conversion |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage on VDD with respect to VSS | -0.6 | 7 | V | 3 | |||
| Voltage on HVC/A0, A1, SCL, SDA, WP, RESET with respect to VSS | -0.6 | 12.5 | V | 3 | |||
| Voltage on all other pins (PxA, PxW, PxB) with respect to VSS (max VDD + 0.3V) | -0.3 | V | 3 | ||||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0, VI > VDD, VI > VPP on HV pins | 3 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VDD | 3 | |
| Maximum output current sunk by any output pin | 25 | mA | 3 | ||||
| Maximum output current sourced by any output pin | 25 | mA | 3 | ||||
| Maximum current out of VSS pin | 100 | mA | 3 | ||||
| Maximum current into VDD pin | 100 | mA | 3 | ||||
| Maximum current into PXA, PXW and PXB pins | -2.5 | 2.5 | mA | 3 | |||
| Storage temperature | -65 | 150 | °C | 3 | |||
| Ambient temperature with power applied | -40 | 125 | °C | 3 | |||
| ESD protection HBM | 4 | kV | HBM | 3 | |||
| ESD protection MM | 300 | V | MM | 3 | |||
| Soldering temperature of leads | 300 | °C | 10 seconds | 3 | |||
| Maximum junction temperature | TJ | 150 | °C | 3 | |||
| Operating temperature range | TA | -40 | 125 | °C | 17 | ||
| Supply voltage | VDD | 2.7 | 5.5 | V | 4 | ||
| Supply voltage (serial interface only) | VDD | 1.8 | 2.7 | V | Serial interface only | 4 | |
| HVC/A0, SDA, SCL, A1, WP, RESET voltage range (min VSS) | VHV | 12.5 | V | VDD ≥ 4.5V | 4 | ||
| VDD start voltage to ensure wiper reset (BOR) | VBOR | 1.65 | V | RAM retention voltage (VRAM) < VBOR | 4 | ||
| Delay after device exits reset state | TBORD | 10 | 20 | µs | VDD > VBOR | 4 | |
| Supply current, serial interface active at 3.4 MHz | IDD | 600 | µA | Serial interface active, HVC/A0 = VIH (or VIL); write all 0's to volatile Wiper 0; VDD = 5.5V, FSCL @ 3.4 MHz | 4 | ||
| Supply current, serial interface active at 100 kHz | IDD | 250 | µA | Serial interface active, HVC/A0 = VIH (or VIL); write all 0's to volatile Wiper 0; VDD = 5.5V, FSCL @ 100 kHz | 4 | ||
| EE write current (write cycle) | IWRITE | 575 | µA | Nonvolatile device only; VDD = 5.5V, FSCL = 400 kHz; write all 0's to NV Wiper 0; SCL = VIL or VIH | 4 | ||
| Serial interface inactive current | ISHDN | 2.5 | 5 | µA | Stop condition, SCL = SDA = VIH, Wiper = 0; VDD = 5.5V, HVC/A0 = VIH | 4 | |
| Resistance RAB (-104 device, 100 kΩ) | RAB | 80 | 100 | 120 | kΩ | -104 devices (Note 1) | 5 |
| Resistance tolerance (RAB, ±20%) | RAB | -20 | 20 | % | -104 devices (100 kΩ) | 5 | |
| Nominal resistance match (/RABWC - RABMEAN/)/RABMEAN, 100 kΩ | (/RABWC - RABMEAN/)/RABMEAN | 0.2 | 1 | % | 100 kΩ | 5 | |
| Nominal resistance match (/RBWWC - RBWMEAN/)/RBWMEAN, 100 kΩ | (/RBWWC - RBWMEAN/)/RBWMEAN | 0.25 | 1.25 | % | 100 kΩ; Code = Full Scale | 5 | |
| Wiper resistance | RW | 75 | 160 | Ω | VDD = 5.5 V, IW = 2.0 mA, code = 00h | 5 | |
| Wiper resistance | RW | 75 | 300 | Ω | VDD = 2.7 V, IW = 2.0 mA, code = 00h | 5 | |
| Maximum current through terminal A | IAW | 2.5 | mA | Terminal A, W = Full Scale (FS) | 6 | ||
| Maximum current through terminal B | IBW | 2.5 | mA | Terminal B, W = Zero Scale (ZS) | 6 | ||
| Maximum current through terminal W | IAW / IBW | 2.5 | mA | IAW (W = FS) or IBW (W = ZS) | 6 | ||
| Maximum RAB current | IAB | 0.069 | mA | VB = 0V, VA = 5.5V, RAB(MIN) = 80000Ω | 6 | ||
| Rheostat R-INL, 7-bit, 100 kΩ, 5.5V | R-INL | -0.8 | 0.5 | 0.8 | LSb | MCP44X2; 7-bit; 5.5V, IW = 45 µA | 8 |
| Rheostat R-INL, 7-bit, 100 kΩ, 3.0V | R-INL | -1.125 | 0.25 | 1.125 | LSb | MCP44X2; 7-bit; 3.0V, IW = 24 µA | 8 |
| Rheostat R-DNL, 7-bit, 100 kΩ, 5.5V | R-DNL | -0.375 | 0.25 | 0.375 | LSb | MCP44X2; 7-bit; 5.5V, IW = 45 µA | 9 |
| Rheostat R-DNL, 7-bit, 100 kΩ, 3.0V | R-DNL | -0.375 | 0.25 | 0.375 | LSb | MCP44X2; 7-bit; 3.0V, IW = 24 µA | 9 |
| High voltage input entry voltage (WiperLock) | VIHHEN | 9 | 12.5 | V | Threshold for WiperLock Technology | 10 | |
| High voltage limit | VMAX | 12.5 | V | Pin can tolerate VMAX or less | 10 | ||
| Output low voltage (SDA) | VOL | 0.4 | V | VDD ≥ 2.0V, IOL = 3 mA | 10 | ||
| Weak pull-up current | IPU | 1.75 | mA | Internal VDD pull-up, VIHH pull-down, VDD = 5.5V, VHVC = 12.5V | 11 | ||
| Input leakage current | IIL | -1 | 1 | µA | VIN = VDD (all pins) and VIN = VSS (all pins except RESET) | 11 | |
| Resistor terminal leakage current into A, W or B (MCP44X2) | IWL | 100 | nA | PxB = PxW = VSS | 6 | ||
| Resistor terminal leakage current (terminals disconnected) | IWL | 100 | nA | Terminals disconnected (RxA = RxW = RxB = 0) | 6 | ||
| Resistance tempco, 100 kΩ (TA = -20 to +70 °C) | ΔRAB/ΔT | 50 | ppm/°C | TA = -20°C to +70°C | 5 | ||
| Resistance tempco, 100 kΩ (TA = -40 to +85 °C) | ΔRAB/ΔT | 100 | ppm/°C | TA = -40°C to +85°C | 5 | ||
| Resistance tempco, 100 kΩ (TA = -40 to +125 °C) | ΔRAB/ΔT | 150 | ppm/°C | TA = -40°C to +125°C | 5 | ||
| Ratiometric tempco | ΔVWB/ΔT | 15 | ppm/°C | Code = Midscale (80h or 40h) | 5 | ||
| Bandwidth -3 dB, 100 kΩ, 7-bit | BW | 100 | kHz | load = 30 pF; 100 kΩ 7-bit, Code = 40h | 7 | ||
| Pin capacitance CIN, COUT | CIN, COUT | 10 | pF | fC = 20 MHz | 11 | ||
| HVC pull-up / pull-down resistance | RHVC | 16 | kΩ | VDD = 5.5V, VHVC = 3V | 11 | ||
| RESET pull-up resistance | RRESET | 16 | kΩ | VDD = 5.5V, VRESET = 0V | 11 | ||
| Thermal resistance, 14L-TSSOP | θJA | 100 | °C/W | 17 | |||
| RESET pulse width | tRST | 50 | ns | 12 | |||
| RESET rising edge, normal mode | tRSTD | 20 | ns | Wiper driving and I2C interface operational | 12 | ||
| SCL clock frequency, standard mode | FSCL | 0 | 100 | kHz | Cb = 400 pF, 1.8V - 5.5V | 13 |
CAD (KiCad official)
- Symbol:
MCP4442-104E - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
mcp4442-104e-etched.step/mcp4442-104e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mcp4442-104e.step/mcp4442-104e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (100 pp, sha256
c64d93992e9b7079, retrieved 2026-10-24, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).