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Contents

README

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MPT65N08

Minos · MOSFETs · TO-220

MPT65N08 from Minos, in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; controls the channel, with absolute maximum VGS of ±20 V and a threshold of 2.0 to 4.0 V (3.0 V typ) at VDS=VGS, ID=250µA.
2 D passive Drain, also connected to the mounting tab; VDSS is 85 V and continuous current is 118 A silicon limited (80 A package limited).
3 S passive Source; current return path, with the body diode rated for a continuous 118 A and a pulsed 320 A.

Key specifications

Parameter Value
Manufacturer Minos
Package TO-220
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage VDSS 85 V VGS=0V, ID=250µA 2
Drain-Source Leakage Current IDSS 1 µA VDS=100V, VGS=0V 2
Drain-Source Leakage Current IDSS 100 µA VDS=80V, VGS=0V @TC=125°C 2
Gate-Source Forward Leakage IGSS(F) 100 nA VGS=+20V 2
Gate-Source Reverse Leakage IGSS(R) -100 nA VGS=-20V 2
Drain-Source On-Resistance RDS(on) 5.4 6.5 mΩ VGS=10V, ID=50A 2
Gate Threshold Voltage VGS(th) 2 3 4 V VDS=VGS, ID=250µA 2
Continuous Source Current IS 118 A 2
Maximum Pulsed Current ISM 320 A 2
Diode Forward Voltage VSD 1.2 V VGS=0V, IS=50A 2
Drain-Source Voltage VDSS 85 V TC=25°C 1
Continuous Drain Current, Silicon Limited ID 118 A TC=25°C 1
Continuous Drain Current, Package Limited ID 80 A TC=25°C 1
Continuous Drain Current, Silicon Limited ID 75 A TC=100°C 1
Pulsed Drain Current IDM 320 A Pulse width limited by maximum junction temperature 1
Gate-Source Voltage VGS -20 20 V TC=25°C 1
Avalanche Energy EAS 100 mJ L=0.5mH, Ias=35A, Start TJ=25℃ 1
Power Dissipation PD 156.2 W TC=25°C 1
Derating Factor above 25°C 1.25 W/℃ above 25°C 1
Operating Junction Temperature TJ 150 ℃ 1
Storage Temperature Range Tstg -55 150 ℃ 1
Maximum Temperature for Soldering TL 260 ℃ 1
Thermal resistance, Junction-Case RθJC 0.55 ℃/W 2
Thermal resistance, Junction-Ambient RθJA 62.5 ℃/W 2
Input Capacitance Ciss 3217 pF VDS=40V, VGS=0, f=1MHz 2
Output Capacitance Coss 510 pF VDS=40V, VGS=0, f=1MHz 2
Reverse Transfer Capacitance Crss 13.5 pF VDS=40V, VGS=0, f=1MHz 2
Total Gate Charge Qg 64 nC VDD=40V, ID=50A, VGS=10V 2
Gate-Source charge Qgs 18.4 nC VDD=40V, ID=50A, VGS=10V 2
Gate-Drain charge Qgd 19 nC VDD=40V, ID=50A, VGS=10V 2
Turn-On Delay Time td(on) 17 ns VDD=40V, ID=50A, VGS=10V, RG=3Ω, Resistive Load 2
Rise Time tr 30 ns VDD=40V, ID=50A, VGS=10V, RG=3Ω, Resistive Load 2
Turn-Off Delay Time td(off) 37 ns VDD=40V, ID=50A, VGS=10V, RG=3Ω, Resistive Load 2
Fall Time tf 20 ns VDD=40V, ID=50A, VGS=10V, RG=3Ω, Resistive Load 2
Reverse Recovery Time Trr 57 ns Is=20A, di/dt=100A/us 2

CAD (KiCad official)

  • Symbol: MPT65N08
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220 (KiCad packages3D, STEP)
  • 3D model files: mpt65n08-etched.step / mpt65n08-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mpt65n08.step / mpt65n08.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Minos datasheet (11 pp, sha256 3fd10072e6049dff, retrieved 2026-10-26, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF