OPA180IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	NC	unconnected	No connection; the datasheet lists this pin as not connected.
2	-IN	input	Inverting input of the amplifier.
3	+IN	input	Noninverting input; the input common-mode range includes the negative rail.
4	V-	power_in	Negative power supply; total supply (V+ minus V-) is 4V to 36V, or ±2V to ±18V in dual-supply operation.
5	NC	unconnected	No connection; the datasheet lists this pin as not connected.
6	OUT	output	Rail-to-rail output that swings within 18mV of the rails.
7	V+	power_in	Positive power supply; total supply (V+ minus V-) is 4V to 36V, or ±2V to ±18V in dual-supply operation.
8	NC	unconnected	No connection; the datasheet lists this pin as not connected.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-8
Category	Amplifiers
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input offset voltage	VIO		15	75	μV	TA = 25°C	9
Input offset voltage drift	dVIO/dT		0.1	0.35	μV/°C	TA = -40°C to +125°C	9
Power supply rejection ratio	PSRR		0.1	0.5	μV/V	VS = 4V to 36V, VCM = VS / 2	9
Power supply rejection ratio over temperature	PSRR			0.5	μV/V	TA = -40°C to +125°C, VS = 4V to 36V, VCM = VS / 2	9
Input bias current	IIB		0.25	1.7	nA	OPA180, OPA4180 (± values)	9
Input bias current over temperature	IIB			18	nA	OPA180, OPA4180: TA = -40°C to +125°C (±)	9
Input offset current	IIO			3.4	nA	OPA180, OPA4180 (±)	9
Input offset current over temperature	IIO			6	nA	OPA180, OPA4180: TA = -40°C to +125°C (±)	9
Common-mode rejection ratio	CMRR	104	114		dB	(V-) < VCM < (V+), 1.5V	9
Common-mode rejection ratio over temperature	CMRR	100	104		dB	TA = -40°C to +125°C, (V-) + 0.5V < VCM < (V+), 1.5V	9
Open-loop voltage gain	AOL	110	120		dB	(V-) + 500mV < VO < (V+), 500mV, RL = 10kΩ	9
Open-loop voltage gain over temperature	AOL	104	114		dB	TA = -40°C to +125°C, (V-) + 500mV < VO < (V+), 500mV, RL = 10kΩ	9
Output swing from rail, no load			8	18	mV	No load	10
Output swing from rail			250	300	mV	RL = 10kΩ	10
Output swing from rail over temperature			325	360	mV	TA = -40°C to +125°C, RL = 10kΩ	10
Quiescent current (per amplifier)	IQ		450	525	μA		10
Quiescent current over temperature	IQ			600	μA	TA = -40°C to +125°C, IO = 0mA	10
Operating voltage range	VS	4		36	V	±2 to ±18 V	10
Supply voltage (single-supply)		4.5		36	V		7
Supply voltage (bipolar)		-2.25		18	V	±2.25 to ±18	7
Operating temperature		-40		125	°C		7
Supply voltage				20	V	±20, ±40 (single-supply)	7
Signal input terminal voltage		-0.5		0.5	V	(V-), 0.5 to (V+) + 0.5	7
Signal input terminal current		-10		10	mA	±10	7
Operating temperature		-55		125	°C		7
Junction temperature	TJ			150	°C		7
Storage temperature	Tstg	-65		150	°C		7
ESD HBM	V(ESD)	-1.5		1.5	kV	Human body model, all pins	7
ESD CDM	V(ESD)	-1		1	kV	Charged device model, all pins	7
Junction-to-ambient thermal resistance	RθJA		115.8		°C/W	D (SOIC) 8 pins	8
Junction-to-case (top) thermal resistance	RθJC(top)		60.1		°C/W	D (SOIC) 8 pins	8
Junction-to-board thermal resistance	RθJB		56.4		°C/W	D (SOIC) 8 pins	8
Junction-to-top characterization parameter	ψJT		12.8		°C/W	D (SOIC) 8 pins	8
Junction-to-board characterization parameter	ψJB		55.9		°C/W	D (SOIC) 8 pins	8
Long-term stability			4		μV		9
Channel separation, DC			1		μV/V		9
Input voltage noise			0.25		μVPP	ƒ = 0.1Hz to 10Hz	9
Input voltage noise density	en		10		nV/√Hz	ƒ = 1kHz	9
Gain bandwidth product	GBW		2		MHz		9
Slew rate	SR		0.8		V/μs	G = 1	9
Short-circuit current	IOS		18		mA	±	10

CAD (KiCad official)

Symbol: OPA180IDR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: opa180idr-etched.step / opa180idr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); opa180idr.step / opa180idr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (49 pp, sha256 9f1eaae19ad36c3f, retrieved 2026-10-31, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

OPA180IDR

Verified OPA180IDR

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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