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Contents

README

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HG1302N

HGSEMI · Real Time Clocks · DIP-8

HG1302N from HGSEMI, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC2 power_in Main supply pin for the dual-supply system; the HG1302 is powered from VCC2 when VCC2 exceeds VCC1 by more than 0.2V, and the recommended supply range is 2.0V to 5.5V.
2 X1 passive Connection for the 32.768kHz crystal, which should be selected for a load capacitance (CL) of 6pF.
3 X2 passive Connection for the 32.768kHz crystal, which should be selected for a load capacitance (CL) of 6pF.
4 GND power_in Ground reference for the device.
5 RST input Reset/enable input that must be driven high to start any data transfer, and driving it low aborts the transfer and forces I/O to high impedance; RST must be logic 0 until VCC is at least 2.5V at power-up, and SCLK must be logic 0 when RST is driven high.
6 I/O bidirectional Serial data input/output line; write data is sampled on the SCLK rising edge and read data is output on the falling edge, and the pin is tri-stated when RST is low.
7 SCLK input Serial clock input that synchronizes command, write and read transfers on the 3-wire interface.
8 VCC1 power_in Backup supply pin for battery or supercapacitor backup of the clock and RAM; the device is powered from VCC1 when VCC2 is not greater than VCC1 by 0.2V, and the recommended supply range is 2.0V to 5.5V.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package DIP-8
Category Clock/Timing
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Pin-to-ground voltage VP -0.5 7 V 3
Operating temperature (HG1302) TA 0 70 ℃ HG1302 3
Storage temperature TS -55 125 ℃ 3
Soldering temperature TH 260 ℃ 10 秒 3
Supply voltage VCC1,VCC2 2 5.5 V TA=0℃~70℃ 3
Logic 1 input voltage VIH 2 V TA=0℃~70℃ 3
Logic 0 input voltage VIL -0.3 0.3 V TA=0℃~70℃; VCC=2.0V 3
Logic 0 input voltage VIL -0.3 0.8 V TA=0℃~70℃; VCC=5V 3
Input capacitance CI 10 pF TA=25℃ 3
I/O capacitance CI/O 15 pF TA=25℃ 3
Crystal oscillator capacitance CX 6 pF TA=25℃ 3
Input leakage current ILI 500 μA 0℃至70℃;VCC=2.5V至5.5V 3
I/O leakage current ILO 500 μA 0℃至70℃;VCC=2.5V至5.5V 3
Logic 1 output voltage VOH 1.6 V 0℃至70℃;VCC=2.5V至5.5V; VCC=2.5V 3
Logic 1 output voltage VOH 2.4 V 0℃至70℃;VCC=2.5V至5.5V; VCC=5V 3
Logic 0 output voltage VOL 0.4 V 0℃至70℃;VCC=2.5V至5.5V; VCC=2.5V 3
Active supply current (VCC1) ICC1A 0.4 mA 0℃至70℃;VCC=2.5V至5.5V; VCC1=2.5V 3
Active supply current (VCC1) ICC1A 1.2 mA 0℃至70℃;VCC=2.5V至5.5V; VCC1=5V 3
Timekeeping current (VCC1) ICC1T 0.3 μA 0℃至70℃;VCC=2.5V至5.5V; VCC1=2.5V 3
Timekeeping current (VCC1) ICC1T 1 μA 0℃至70℃;VCC=2.5V至5.5V; VCC1=5V 3
Standby current (VCC1) ICC1S 100 nA 0℃至70℃;VCC=2.5V至5.5V; VCC1=2.5V 3
Active supply current (VCC2) ICC2A 0.425 mA 0℃至70℃;VCC=2.5V至5.5V; VCC2=2.5V 4
Active supply current (VCC2) ICC2A 1.28 mA 0℃至70℃;VCC=2.5V至5.5V; VCC2=5V 4
Timekeeping current (VCC2) ICC2T 25.3 μA 0℃至70℃;VCC=2.5V至5.5V; VCC2=2.5V 4
Timekeeping current (VCC2) ICC2T 81 μA 0℃至70℃;VCC=2.5V至5.5V; VCC2=5V 4
Standby current (VCC2) ICC2S 25 μA 0℃至70℃;VCC=2.5V至5.5V; VCC2=2.5V 4
Standby current (VCC2) ICC2S 80 μA 0℃至70℃;VCC=2.5V至5.5V; VCC2=5V 4
CLK to RST hold time tcch 240 ns VCC=2.5V 4
CLK to RST hold time tcch 60 ns VCC=5V 4
RST inactive time tcwh 4 ns VCC=2.5V 4
RST inactive time tcwh 1 ns VCC=5V 4
RST to I/O high-Z tcdz 280 ns VCC=2.5V 4
RST to I/O high-Z tcdz 70 ns VCC=5V 4
SCLK to I/O high-Z tccz 280 ns VCC=2.5V 4
SCLK to I/O high-Z tccz 70 ns VCC=5V 4
Data to CLK setup time tdc 200 ns VCC=2.5V 4
Data to CLK setup time tdc 50 ns VCC=5V 4
CLK to data hold time tcdh 280 ns VCC=2.5V 4
CLK to data hold time tcdh 70 ns VCC=5V 4
CLK to data delay tcdd 800 ns VCC=2.5V 4
CLK to data delay tcdd 200 ns VCC=5V 4
CLK low time tcl 1000 ns VCC=2.5V 4
CLK low time tcl 250 ns VCC=5V 4
CLK high time tch 1000 ns VCC=2.5V 4
CLK high time tch 250 ns VCC=5V 4
CLK frequency tclk 0.5 MHz VCC=2.5V 4
CLK frequency tclk 2 MHz VCC=5V 4
CLK rise and fall time tr,tf 2000 ns VCC=2.5V 4
CLK rise and fall time tr,tf 500 ns VCC=5V 4
RST to CLK setup time tCC 4 µs VCC=2.5V 4
RST to CLK setup time tCC 1 µs VCC=5V 4
Trickle charge resistance R1 R1 2 kΩ 4
Trickle charge resistance R2 R2 4 kΩ 4
Trickle charge resistance R3 R3 8 kΩ 4
Trickle charge diode forward drop VTD 0.7 V 4

CAD (KiCad official)

  • Symbol: HG1302N
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)
  • 3D model files: hg1302n-etched.step / hg1302n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hg1302n.step / hg1302n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (14 pp, sha256 313dc8a655711ee6, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF