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Contents

README

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LSRV04W-4AT1G

LRC · ESD And Surge Protection (TVS/ESD) · TSOP-6

LSRV04W-4AT1G from LRC, in a TSOP-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I/O1 passive ESD-protected channel 1 I/O line, steered by rail diodes, with 1.5pF (max) capacitance to GND and VRWM of 3.3V.
2 GND power_in Negative rail pin connected to system ground; positive ESD current is steered to it through the ESD diode and zener diode.
3 I/O2 passive ESD-protected channel 2 I/O line, steered by rail diodes, with 1.5pF (max) capacitance to GND and VRWM of 3.3V.
4 I/O4 passive ESD-protected channel 4 I/O line, steered by rail diodes, with 1.5pF (max) capacitance to GND and VRWM of 3.3V.
5 VREF power_in Positive rail pin of the diode array, with the integrated zener diode between it and GND clamping positive ESD voltage to the zener voltage.
6 I/O3 passive ESD-protected channel 3 I/O line, steered by rail diodes, with 1.5pF (max) capacitance to GND and VRWM of 3.3V.

Key specifications

Parameter Value
Manufacturer LRC
Package TSOP-6
Category Circuit Protection
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Peak Pulse Current (8/20 µs, any I/O-to-GND) IPP 20 A 8/20 µs pulse, any I/O-to-GND 2
ESD per IEC 61000-4-2 (Air) VESD1 -30 30 kV IEC 61000-4-2 air discharge 2
ESD per IEC 61000-4-2 (Contact) VESD2 -30 30 kV IEC 61000-4-2 contact discharge 2
Operating Temperature Range Topr -55 125 °C 2
Junction and Storage Temperature Range Tstg -55 150 °C 2
Reverse Working Voltage VRWM 3.3 V Any I/O pin to GND 2
Reverse Breakdown Voltage VBR 5.6 V IT=1mA; Any I/O pin to GND 2
Reverse Leakage Current IR 1 µA VRWM=3.3V, T=25°C; Any I/O pin to GND 2
Positive Clamping Voltage (1A) VC1 8.5 12 V IPP=1A, tP=8/20µs; Positive pulse; Any I/O pin to GND 2
Junction Capacitance Between I/O pins CJ1 0.8 1 pF VR=0V, f=1MHz; Between I/O pins 2
Junction Capacitance Between I/O and GND CJ2 1.5 2 pF VR=0V, f=1MHz; Any I/O pin to GND 2
Positive Clamping Voltage (20A) VC1 13 16 V IPP=20A, tP=8/20µs; Positive pulse; Any I/O pin to GND 2
Negative Clamping Voltage (20A) VC2 6 8 V IPP=20A, tP=8/20µs; Negative pulse; Any I/O pin to GND 2
Negative Clamping Voltage (1A) VC2 1.8 V IPP=1A, tP=8/20µs; Negative pulse; Any I/O pin to GND 2

CAD (KiCad official)

  • Symbol: LSRV04W-4AT1G
  • Footprint: Package_SO:TSOP-6_1.65x3.05mm_P0.95mm
  • 3D model: TSOP-6 (KiCad packages3D, STEP)
  • 3D model files: lsrv04w-4at1g-etched.step / lsrv04w-4at1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lsrv04w-4at1g.step / lsrv04w-4at1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (6 pp, sha256 dfb44fff44f3521e, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF