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Contents

README

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SN74LVC74ADR

Texas Instruments · Flip Flops · SOIC-14

SN74LVC74ADR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ~{1CLR} input Channel 1 clear input; pulling it low sets the 1Q output low.
2 1D input Channel 1 data input.
3 1CLK input Channel 1 clock input; the flip-flop is positive-edge triggered.
4 ~{1PRE} input Channel 1 preset input; pulling it low sets the 1Q output high.
5 1Q output Channel 1 output.
6 ~{1Q} output Channel 1 inverted output.
7 GND power_in Ground.
8 ~{2Q} output Channel 2 inverted output.
9 2Q output Channel 2 output.
10 ~{2PRE} input Channel 2 preset input; pulling it low sets the 2Q output high.
11 2CLK input Channel 2 clock input; the flip-flop is positive-edge triggered.
12 2D input Channel 2 data input.
13 ~{2CLR} input Channel 2 clear input; pulling it low sets the 2Q output low.
14 VCC power_in Supply voltage; operating range is 1.65 V to 3.6 V for SN74LVC74A.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 6.5 V 4
Input voltage VI -0.5 6.5 V 4
Output voltage VO -0.5 V 4
Input clamp current IIK -50 mA VI < 0 4
Output clamp current IOK -50 mA VO < 0 4
Continuous output current IO -50 50 mA 4
Continuous current through VCC or GND -100 100 mA 4
Storage temperature Tstg -65 150 °C 4
Supply voltage, operating (SN74LVC74A) VCC 1.65 3.6 V Operating 4
Supply voltage, data retention only VCC 1.5 V Data retention only 4
High-level input voltage VIH 0.65 × VCC VCC = 1.65 V to 1.95 V (SN74LVC74A) 4
High-level input voltage VIH 1.7 V VCC = 2.3 V to 2.7 V (SN74LVC74A) 4
High-level input voltage VIH 2 V VCC = 2.7 V to 3.6 V 4
Low-level input voltage VIL 0.35 × VCC VCC = 1.65 V to 1.95 V (SN74LVC74A) 4
Low-level input voltage VIL 0.7 V VCC = 2.3 V to 2.7 V (SN74LVC74A) 4
Low-level input voltage VIL 0.8 V VCC = 2.7 V to 3.6 V 4
Input voltage VI 0 5.5 V 4
Output voltage VO 0 V 4
High-level output current IOH -4 mA VCC = 1.65 V (SN74LVC74A) 4
High-level output current IOH -8 mA VCC = 2.3 V (SN74LVC74A) 4
High-level output current IOH -12 mA VCC = 2.7 V 4
High-level output current IOH -24 mA VCC = 3 V 4
Low-level output current IOL 4 mA VCC = 1.65 V (SN74LVC74A) 4
Low-level output current IOL 8 mA VCC = 2.3 V (SN74LVC74A) 4
Low-level output current IOL 12 mA VCC = 2.7 V 4
Low-level output current IOL 24 mA VCC = 3 V 4
Input transition rise or fall rate Δt/Δv 10 ns/V 4
Operating free-air temperature (SN74LVC74A) TA -40 125 °C 5
High-level output voltage VOH 1.2 V IOH = -4 mA, VCC = 1.65 V, TA = -40°C to 125°C (SN74LVC74A only) 5
High-level output voltage VOH 1.7 V IOH = -8 mA, VCC = 2.3 V, TA = -40°C to 125°C (SN74LVC74A only) 5
High-level output voltage VOH 2.2 V IOH = -12 mA, VCC = 2.7 V 5
High-level output voltage VOH 2.4 V IOH = -12 mA, VCC = 3 V 5
Low-level output voltage VOL 0.2 V IOL = 100 µA, VCC = 1.65 V to 3.6 V, TA = -40°C to 125°C (SN74LVC74A only) 5
Low-level output voltage VOL 0.45 V IOL = 4 mA, VCC = 1.65 V, TA = -40°C to 125°C (SN74LVC74A only) 5
Low-level output voltage VOL 0.7 V IOL = 8 mA, VCC = 2.3 V, TA = -40°C to 125°C (SN74LVC74A only) 5
Low-level output voltage VOL 0.4 V IOL = 12 mA, VCC = 2.7 V 5
Low-level output voltage VOL 0.55 V IOL = 24 mA, VCC = 3 V 5
Input current II -5 5 µA VI = 5.5 V or GND, VCC = 3.6 V 5
Supply current ICC 10 µA VI = VCC or GND, IO = 0, VCC = 3.6 V 5
Change in supply current ΔICC 500 µA One input at VCC, 0.6 V, other inputs at VCC or GND, VCC = 2.7 V to 3.6 V 5
Clock frequency fclock 150 MHz TA = -40°C to 85°C and VCC = 3.3 V ± 0.3 V 7
Clock frequency fclock 100 MHz TA = -40°C to 125°C, VCC = 3.3 V ± 0.3 V 7
Clock frequency fclock 83 MHz TA = -40°C to 125°C, VCC = 2.7 V 7
Pulse duration, CLK high or low tw 3.3 ns VCC = 2.7 V or 3.3 V 7
Pulse duration, PRE or CLR low tw 3.3 ns VCC = 2.7 V or 3.3 V 7
Setup time before CLK↑, Data tsu 3 ns TA = -40°C to 85°C and VCC = 3.3 V ± 0.3 V 7
Hold time, data after CLK↑ th 1 ns VCC = 2.7 V or 3.3 V 7
Propagation delay time, CLK to Q or Q̅ tpd 6 ns TA = -40°C to 125°C, VCC = 2.7 V 8
Propagation delay time, CLK to Q or Q̅ tpd 5.2 ns TA = -40°C to 125°C, VCC = 3.3 V ± 0.3 V 8
Propagation delay time, PRE or CLR to Q or Q̅ tpd 6.4 ns TA = -40°C to 125°C, VCC = 2.7 V 8
Propagation delay time, PRE or CLR to Q or Q̅ tpd 5.4 ns TA = -40°C to 125°C, VCC = 3.3 V ± 0.3 V 8
Skew (time), output tsk(o) 1 ns TA = -40°C to 85°C and VCC = 3.3 V ± 0.3 V 8
Junction-to-ambient thermal resistance (D, SOIC) RθJA 127.8 °C/W D (SOIC) package 5
Junction-to-case (top) thermal resistance (D, SOIC) RθJC(top) 54.8 °C/W D (SOIC) package 5
Junction-to-board thermal resistance (D, SOIC) RθJB 48 °C/W D (SOIC) package 5
Junction-to-top characterization parameter (D, SOIC) ψJT 20.3 °C/W D (SOIC) package 5
Junction-to-board characterization parameter (D, SOIC) ψJB 47.7 °C/W D (SOIC) package 5
Input capacitance Ci 5 pF VI = VCC or GND, VCC = 3.3 V, TA = 25°C 6

CAD (KiCad official)

  • Symbol: SN74LVC74ADR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: sn74lvc74adr-etched.step / sn74lvc74adr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc74adr.step / sn74lvc74adr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 5ebad76badd3a17b, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF