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SN74LV541APWR

Public Made by Adom

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Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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SN74LV541APWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

SN74LV541APWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Output enable input 1, active low.
2 A1 input Input for channel 1.
3 A2 input Input for channel 2.
4 A3 input Input for channel 3.
5 A4 input Input for channel 4.
6 A5 input Input for channel 5.
7 A6 input Input for channel 6.
8 A7 input Input for channel 7.
9 A8 input Input for channel 8.
10 GND power_in Ground.
11 Y8 output Output for channel 8.
12 Y7 output Output for channel 7.
13 Y6 output Output for channel 6.
14 Y5 output Output for channel 5.
15 Y4 output Output for channel 4.
16 Y3 output Output for channel 3.
17 Y2 output Output for channel 2.
18 Y1 output Output for channel 1.
19 OE2 input Output enable input 2, active low.
20 VCC power_in Positive supply; the device operates from 2 V to 5.5 V VCC (per Features, page 1).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 2 5.5 V 5
High-level input voltage VIH 1.5 V VCC = 2 V 5
Low-level input voltage VIL 0.5 V VCC = 2 V 5
Input voltage VI 0 5.5 V 5
Output voltage, 3-state VO 0 5.5 V 3-state 5
Output voltage, high or low state VO 0 V High or low state; maximum printed as VCC 5
High-level output current IOH -50 µA VCC = 2 V 5
High-level output current IOH -2 mA VCC = 2.3 V to 2.7 V 5
High-level output current IOH -8 mA VCC = 3 V to 3.6 V 5
High-level output current IOH -16 mA VCC = 4.5 V to 5.5 V 5
Low-level output current IOL 50 µA VCC = 2 V 5
Low-level output current IOL 2 mA VCC = 2.3 V to 2.7 V 5
Low-level output current IOL 8 mA VCC = 3 V to 3.6 V 5
Low-level output current IOL 16 mA VCC = 4.5 V to 5.5 V 5
Input transition rise or fall rate Δt/Δv 200 ns/V VCC = 2.3 V to 2.7 V 5
Input transition rise or fall rate Δt/Δv 100 ns/V VCC = 3 V to 3.6 V 5
Input transition rise or fall rate Δt/Δv 20 ns/V VCC = 4.5 V to 5.5 V 5
Operating free-air temperature TA -40 125 °C 5
Supply voltage range VCC -0.5 7 V 4
Input voltage range VI -0.5 7 V 4
Voltage range applied to any output in high-impedance or power-off state VO -0.5 7 V 4
Output voltage range applied in high or low state VO -0.5 V High or low state; maximum printed as VCC + 0.5 4
Input clamp current IIK -20 mA VI < 0 4
Output clamp current IOK -50 mA VO < 0 4
Continuous output current IO -35 35 mA VO = 0 to VCC 4
Continuous current through VCC or GND ICC/IGND -70 70 mA 4
Storage temperature range Tstg -65 150 °C 4
High-level output voltage VOH 2 V IOH = -2 mA, VCC = 2.3 V, TA = -40°C to 125°C 6
High-level output voltage VOH 2.48 V IOH = -8 mA, VCC = 3 V, TA = -40°C to 125°C 6
High-level output voltage VOH 3.8 V IOH = -16 mA, VCC = 4.5 V, TA = -40°C to 125°C 6
Low-level output voltage VOL 0.1 V IOL = 50 µA, VCC = 2 V to 5.5 V, TA = -40°C to 125°C 6
Low-level output voltage VOL 0.4 V IOL = 2 mA, VCC = 2.3 V, TA = -40°C to 125°C 6
Low-level output voltage VOL 0.44 V IOL = 8 mA, VCC = 3 V, TA = -40°C to 125°C 6
Low-level output voltage VOL 0.55 V IOL = 16 mA, VCC = 4.5 V, TA = -40°C to 125°C 6
Input current II -1 1 µA VI = 5.5 V or GND, VCC = 0 to 5.5 V, TA = -40°C to 125°C 6
Off-state output current IOZ -5 5 µA VO = VCC or GND, VCC = 5.5 V, TA = -40°C to 125°C 6
Supply current ICC 20 µA VI = VCC or GND, IO = 0, VCC = 5.5 V, TA = -40°C to 125°C 6
Partial power-down current Ioff 5 µA VI or VO = 0 to 5.5 V, VCC = 0 V, TA = -40°C to 125°C 6
Propagation delay A to Y tpd 1 13.5 ns VCC = 2.5 V ± 0.2 V, CL = 15 pF, TA = -40°C to 125°C 6
Enable time OE to Y ten 1 19.5 ns VCC = 2.5 V ± 0.2 V, CL = 15 pF, TA = -40°C to 125°C 6
Disable time OE to Y tdis 1 15 ns VCC = 2.5 V ± 0.2 V, CL = 15 pF, TA = -40°C to 125°C 6
Propagation delay A to Y tpd 1 18.5 ns VCC = 2.5 V ± 0.2 V, CL = 50 pF, TA = -40°C to 125°C 6
Enable time OE to Y ten 1 24 ns VCC = 2.5 V ± 0.2 V, CL = 50 pF, TA = -40°C to 125°C 6
Disable time OE to Y tdis 1 20 ns VCC = 2.5 V ± 0.2 V, CL = 50 pF, TA = -40°C to 125°C 6
Output skew tsk(o) 2 ns VCC = 2.5 V ± 0.2 V, TA = -40°C to 125°C 6
Propagation delay A to Y tpd 1 8.5 ns VCC = 3.3 V ± 0.3 V, CL = 15 pF, TA = -40°C to 125°C 6
Enable time OE to Y ten 1 12.5 ns VCC = 3.3 V ± 0.3 V, CL = 15 pF, TA = -40°C to 125°C 6
Disable time OE to Y tdis 1 12 ns VCC = 3.3 V ± 0.3 V, CL = 15 pF, TA = -40°C to 125°C 6
Propagation delay A to Y tpd 1 12 ns VCC = 3.3 V ± 0.3 V, CL = 50 pF, TA = -40°C to 125°C 6
Enable time OE to Y ten 1 16 ns VCC = 3.3 V ± 0.3 V, CL = 50 pF, TA = -40°C to 125°C 6
Disable time OE to Y tdis 1 17.5 ns VCC = 3.3 V ± 0.3 V, CL = 50 pF, TA = -40°C to 125°C 6
Output skew tsk(o) 1.5 ns VCC = 3.3 V ± 0.3 V, TA = -40°C to 125°C 6
Propagation delay A to Y tpd 1 6 ns VCC = 5 V ± 0.5 V, CL = 15 pF, TA = -40°C to 125°C 7
Enable time OE to Y ten 1 8.5 ns VCC = 5 V ± 0.5 V, CL = 15 pF, TA = -40°C to 125°C 7
Disable time OE to Y tdis 1 8 ns VCC = 5 V ± 0.5 V, CL = 15 pF, TA = -40°C to 125°C 7
Propagation delay A to Y tpd 1 8 ns VCC = 5 V ± 0.5 V, CL = 50 pF, TA = -40°C to 125°C 7
Enable time OE to Y ten 1 10.5 ns VCC = 5 V ± 0.5 V, CL = 50 pF, TA = -40°C to 125°C 7
Disable time OE to Y tdis 1 10 ns VCC = 5 V ± 0.5 V, CL = 50 pF, TA = -40°C to 125°C 7
Output skew tsk(o) 1 ns VCC = 5 V ± 0.5 V, TA = -40°C to 125°C 7
Junction-to-ambient thermal resistance (PW package) RθJA 128.2 °C/W PW package 5

CAD (KiCad official)

  • Symbol: SN74LV541APWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74lv541apwr-etched.step / sn74lv541apwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lv541apwr.step / sn74lv541apwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (40 pp, sha256 081020c4f40ddb5d, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF