AT32UC3C2512C-A2UT from Microchip Tech, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	PA00	bidirectional	GPIO PA00 on VDDIO1 supply, also JTAG TCK and CANIF TXLINE[1] (function A).
2	PA01	bidirectional	GPIO PA01 on VDDIO1 supply, also JTAG TDI, CANIF RXLINE[1] and PEVC PAD_EVT[0].
3	PA02	bidirectional	GPIO PA02 on VDDIO1 supply, also JTAG TDO, aWire DATAOUT, SCIF GCLK[0] and PEVC PAD_EVT[1].
4	PA03	bidirectional	GPIO PA03 on VDDIO1 supply, also JTAG TMS, SCIF GCLK[1] and EIC EXTINT[1].
5	VDDIO1	power_in	I/O power supply, 4.5V to 5.5V or 3.0V to 3.6V.
6	GNDIO1	power_in	Ground for the VDDIO1 I/O supply.
7	PA04	bidirectional	GPIO PA04 on VDDANA supply, also ADCIN0, USBC ID and ACIFA0 ACAOUT.
8	PA05	bidirectional	GPIO PA05 on VDDANA supply, also ADCIN1, USBC VBOF and ACIFA0 ACBOUT.
9	PA06	bidirectional	GPIO PA06 on VDDANA supply, also ADCIN2, AC1AP1 and PEVC PAD_EVT[2].
10	PA07	bidirectional	GPIO PA07 on VDDANA supply, also ADCIN3, AC1AN1 and PEVC PAD_EVT[3].
11	PA08	bidirectional	GPIO PA08 on VDDANA supply, also ADCIN4, AC1BP1, EIC EXTINT[2] and Nexus EVTI_N (AXS=0).
12	PA09	bidirectional	GPIO PA09 on VDDANA supply, also ADCIN5, AC1BN1 and Nexus MDO[0] (AXS=0).
13	PA16	bidirectional	GPIO PA16 on VDDANA supply, also ADCREF0 and DACREF.
14	ADCVREFP	input	ADC positive reference voltage input.
15	ADCVREFN	input	ADC negative reference voltage input.
16	PA19	bidirectional	GPIO PA19 on the analog supply domain, also Nexus MDO[1] (AXS=0).
17	GNDANA	power_in	Analog ground.
18	VDDANA	power_in	Analog power supply, 4.5V to 5.5V or 3.0V to 3.6V.
19	PA20	bidirectional	General-purpose I/O line PA20.
20	PA21	bidirectional	General-purpose I/O line PA21.
21	PA22	bidirectional	GPIO PA22, also Nexus MDO[2] (AXS=0).
22	PA23	bidirectional	GPIO PA23, also Nexus MDO[3] (AXS=0).
23	VBUS	power_in	USB bus power (VBUS) detection pin.
24	DM	bidirectional	USB data minus line.
25	DP	bidirectional	USB data plus line.
26	GNDPLL	power_in	Ground for the PLL.
27	VDDIN_5	power_in	Voltage regulator input for single 5V supply operation.
28	VDDIN_33	power_in	Voltage regulator input for single 3.3V supply operation.
29	VDDCORE	power_out	Core supply pin connected to the internal voltage regulator.
30	GNDCORE	power_in	Core ground.
31	PB30	bidirectional	GPIO PB30, also oscillator pin XIN0.
32	PB31	bidirectional	GPIO PB31, also oscillator pin XOUT0.
33	PC02	bidirectional	General-purpose I/O line PC02.
34	PC03	bidirectional	General-purpose I/O line PC03.
35	VDDIO2	power_in	I/O power supply, 4.5V to 5.5V or 3.0V to 3.6V.
36	GNDIO2	power_in	Ground for the VDDIO2 I/O supply.
37	PC04	bidirectional	GPIO PC04, also Nexus MDO[4] (AXS=0).
38	PC05	bidirectional	GPIO PC05, also Nexus MDO[5] (AXS=0).
39	PC15	bidirectional	General-purpose I/O line PC15.
40	PC16	bidirectional	General-purpose I/O line PC16.
41	PC17	bidirectional	General-purpose I/O line PC17.
42	PC18	bidirectional	General-purpose I/O line PC18.
43	PC19	bidirectional	General-purpose I/O line PC19.
44	PC20	bidirectional	General-purpose I/O line PC20.
45	PC21	bidirectional	General-purpose I/O line PC21.
46	PC22	bidirectional	General-purpose I/O line PC22.
47	PD00	bidirectional	General-purpose I/O line PD00.
48	PD01	bidirectional	General-purpose I/O line PD01.
49	PD02	bidirectional	General-purpose I/O line PD02.
50	PD03	bidirectional	General-purpose I/O line PD03.
51	VDDIO3	power_in	I/O power supply, 4.5V to 5.5V or 3.0V to 3.6V.
52	GNDIO3	power_in	Ground for the VDDIO3 I/O supply.
53	PD11	bidirectional	General-purpose I/O line PD11.
54	PD12	bidirectional	General-purpose I/O line PD12.
55	PD13	bidirectional	GPIO PD13, also Nexus MCKO (AXS=0).
56	PD14	bidirectional	GPIO PD14, also Nexus MSEO[0] (AXS=0).
57	PD21	bidirectional	GPIO PD21 on VDDIO3 supply, also USART3 TXD, EIC EXTINT[0] and QDEC1 QEPI.
58	PD27	bidirectional	GPIO PD27 on VDDIO1 supply, also USART0 TXD, CANIF RXLINE[0], TC0 A0 and MACB RX_ER.
59	PD28	bidirectional	GPIO PD28 on VDDIO1 supply, also USART0 RXD, CANIF TXLINE[0], TC0 B0 and MACB RX_DV.
60	PD29	bidirectional	GPIO PD29 on VDDIO1 supply, also USART0 CTS, EIC EXTINT[6], USART0 CLK, TC0 CLK0, MACB TX_CLK and Nexus EVTO_N.
61	PD30	bidirectional	GPIO PD30 on VDDIO1 supply, also USART0 RTS, EIC EXTINT[3], TC0 A1 and MACB TX_EN.
62	PB00	bidirectional	GPIO PB00, also 32 kHz oscillator pin XIN32.
63	PB01	bidirectional	GPIO PB01, also 32 kHz oscillator pin XOUT32.
64	RESET_N	input	Reset input, also used as the aWire DATA pin once aWire is enabled.

Key specifications

Parameter	Value
Manufacturer	Microchip Tech
Package	TQFP-64(10x10)
Category	Embedded Processors & Controllers
Pins	64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
DC supply internal regulators 3V range	VVDDIN_5	3		3.6	V	3V range	50
DC supply internal regulators 5V range	VVDDIN_5	4.5		5.5	V	5V range	50
DC supply USB I/O	VVDDIN_33	3		3.6	V	only in 3V range	50
DC supply peripheral I/O and analog 3V range	VVDDANA	3		3.6	V	3V range	50
DC supply peripheral I/O and analog 5V range	VVDDANA	4.5		5.5	V	5V range	50
DC supply peripheral I/O 3V range	VVDDIO	3		3.6	V	3V range	50
DC supply peripheral I/O 5V range	VVDDIO	4.5		5.5	V	5V range	50
Operating temperature		-40		85	°C		50
Storage temperature		-60		150	°C		50
Voltage on any pin except DM/DP/VBUS		-0.3			V	with respect to ground; max VVDD+0.3V	50
Voltage on DM/DP		-0.3		3.6	V	with respect to ground	50
Voltage on VBUS		-0.3		5.5	V	with respect to ground	50
Maximum operating voltage VDDIN_5				5.5	V		50
Maximum operating voltage VDDIO1/2/3, VDDANA				5.5	V		50
Maximum operating voltage VDDIN_33				3.6	V		50
Total DC output current on all I/O pins per supply				120	mA	VDDIO1, VDDIO2, VDDIO3, VDDANA each	50
CPU clock frequency	fCPU			66	MHz	VVDDCORE > 1.85V, -40 to 85°C	51
Active mode current			512		µA/MHz	CPU running recursive Fibonacci, 3.3V, TA=25°C	52
Pull-up resistance	RPULLUP	5		26	kOhm	VVDD = 3V	55
Pull-up resistance	RPULLUP	5		16	kOhm	VVDD = 5V	55
Pull-down resistance	RPULLDOWN	2		16	kOhm		55
Input low-level voltage	VIL			0.3	V	VVDD = 3V; 0.3*VVDDIO	55
Input high-level voltage	VIH	0.7			V	VVDD = 3.6V; 0.7*VVDDIO	55
Output low-level voltage	VOL			0.45	V	IOL = -7mA, pin drive x2	55
Input leakage current	ILEAK			1	µA	Pull-up resistors disabled	56
Input capacitance	CIN		7.5		pF	PA00-PA29, PB00-PB31, PC00-PC01, PC08-PC31, PD00-PD30	56
XIN clock frequency	fCPXIN			50	MHz		57
Crystal oscillator frequency	fOUT	0.4		20	MHz		58
32 kHz crystal load capacitance	CL	6		15	pF		58
PLL output frequency	fVCO	80		240	MHz		59
PLL input frequency	fIN	4		16	MHz		59
RC120M output frequency	fOUT	88	120	152	MHz		59
RCSYS output frequency	fOUT	105	109	115	kHz	TA = 25°C	59
RC8M output frequency	fOUT	7.6	8	8.4	MHz	SCIF.RCCR8.FREQMODE = 0	59
RC8M output frequency	fOUT	0.955	1	1.045	MHz	SCIF.RCCR8.FREQMODE = 1	59
Flash data retention	tRET	15			years		60
1.8V regulator output voltage	VVDDCORE		1.85		V	calibrated value	61
1.8V regulator DC output current	IOUT			80	mA		61
3.3V regulator output voltage	VVDDIN_33		3.4		V	calibrated value	61
3.3V regulator DC output current	IOUT			35	mA		61
3.3V regulator static current	IVREG		10		µA	Low power mode	61
ADC offset error 12-bit		-7		7	mV	Differential mode, VVDDANA = 3V, VADCREF0 = 1V, SRES = 0	64
ADC gain error 12-bit		-20		20	mV	Differential mode, VVDDANA = 3V, VADCREF0 = 1V, SRES = 0	64
ADC INL 12-bit	INL			5	LSB	Differential mode, VVDDANA = 3V, VADCREF0 = 1V, SRES = 0	64
ADC DNL 12-bit	DNL			3	LSB	Differential mode, VVDDANA = 3V, VADCREF0 = 1V, SRES = 0	64
ADC input voltage range	VADCINn	0			V	max VVDDANA	64
DAC offset error		-30		30	mV	VVDDANA = 3V, VDACREF = 2V, One S/H	68
DAC gain error		-30		30	mV	VVDDANA = 3V, VDACREF = 2V, One S/H	68
Comparator offset, high speed	VOFFSET	-16		16	mV	No hysteresis, High Speed mode	69
Comparator offset, low power	VOFFSET	-29		29	mV	No hysteresis, Low Power mode	69
Startup time from power-up, using regulator				2600	µs	VDDIN_5 rising (10 mV/ms)	70
Startup time from reset release				1240	µs		70
Junction-to-ambient thermal resistance TQFP64	θJA		40.5		°C/W	No air flow, TQFP64	90
Junction-to-case thermal resistance TQFP64	θJC		8.7		°C/W	TQFP64	90

CAD (KiCad official)

Symbol: AT32UC3C2512C-A2UT
Footprint: Package_QFP:TQFP-64_10x10mm_P0.5mm
3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
3D model files: at32uc3c2512c-a2ut-etched.step / at32uc3c2512c-a2ut-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); at32uc3c2512c-a2ut.step / at32uc3c2512c-a2ut.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip Tech datasheet (110 pp, sha256 2455159d14676b46, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

AT32UC3C2512C-A2UT

Verified AT32UC3C2512C-A2UT

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README