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REF5040AQDRQ1

Public Made by Adom

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Texas Instruments Voltage Reference, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)ref5040aqdrq1factory-2.0.0extractor-text
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Symbol & Footprint

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Datasheet

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Contents

README

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REF5040AQDRQ1

Texas Instruments · Voltage Reference · SOIC-8

REF5040AQDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DNC unconnected Do not connect; this pin must not be used.
2 VIN power_in Input supply voltage, which must be at least VOUT + 0.2 V and no more than 18 V (absolute maximum 18 V).
3 TEMP output Temperature-dependent voltage output with approximately 60-kΩ source impedance; it is high impedance, so low-impedance loads cause measurement error and should be buffered.
4 GND power_in Ground reference for the device.
5 TRIM/NR input Trim and noise reduction pin providing a ±15-mV adjustment of VOUT; a capacitor to GND (1 µF suggested) forms a low-pass filter with the internal 1-kΩ resistor.
6 VOUT output Reference voltage output, capable of sourcing and sinking up to ±10 mA.
7 NC unconnected No internal connection; this pin must not be used.
8 DNC unconnected Do not connect; this pin must not be used.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Initial accuracy, standard grade -0.1 0.1 % TA = 25°C, ILOAD = 0, CL = 1 μF, VIN = (VOUT + 0.2 V) to 18 V (table header) 5
Output voltage temperature drift, standard grade dVOUT/dT 3 8 ppm/°C Over temperature 6
Line regulation (all devices except REF5020) dVOUT/dVIN 0.1 1 ppm/V VIN = VOUT + 0.2 V 6
Line regulation, over temperature (all devices) dVOUT/dVIN 0.2 1 ppm/V Over temperature 6
Load regulation (all devices except REF5020) dVOUT/dILOAD 20 30 ppm/mA -10 mA < ILOAD < +10 mA, VIN = VOUT + 0.75 V 6
Load regulation, over temperature (all devices) dVOUT/dILOAD 50 ppm/mA Over temperature, -10 mA < ILOAD < +10 mA 6
Power supply, quiescent current IQ 0.8 1 mA TA = 25°C, ILOAD = 0, CL = 1 μF, VIN = (VOUT + 0.2 V) to 18 V (table header) 6
Power supply, quiescent current, over temperature IQ 1.2 mA Over temperature 6
Specified temperature range -40 125 °C 6
Operating temperature range -55 125 °C 6
Power supply voltage VS 18 V See Note (1); printed minimum is VOUT + 0.2 V 6
Input voltage 18 V 4
Output short-circuit 30 mA 4
Operating temperature -40 125 °C 4
Junction temperature (TJ max) TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
Supply input voltage VIN 18 V Minimum printed as VOUT + 0.2 V (footnote 1: 2.7 V for VOUT ≤ 2.5 V, not applicable) 5
Electrostatic discharge, human-body model (REF5020A-Q1, REF5040A-Q1, REF5050A-Q1 group) V(ESD) -500 500 V HBM per AEC Q100-002 4
Electrostatic discharge, charged-device model (REF5020A-Q1, REF5040A-Q1, REF5050A-Q1 group) V(ESD) -1000 1000 V CDM per AEC Q100-011 4
Electrostatic discharge, machine model (REF5020A-Q1, REF5040A-Q1, REF5050A-Q1 group) V(ESD) 200 V Machine model; printed as 200 without sign 4
Output voltage VOUT 4.096 V 5
Output voltage noise 12 μVPP f = 0.1 Hz to 10 Hz 5
Short-circuit current ISC 25 mA VOUT = 0 V 6
Voltage output, TEMP pin 575 mV At TA = 25°C 6
Temperature sensitivity, TEMP pin 2.64 mV/°C Over temperature 6
Turn-on settling time 200 μs To 0.1% with CL = 1 μF 6
Thermal hysteresis, standard grade 10 ppm Cycle 1 6
Thermal hysteresis, standard grade 5 ppm Cycle 2 6
Long-term stability 90 ppm/1000 hr 0 to 1000 hours 6
Long-term stability 10 ppm/1000 hr 1000 to 2000 hours 6
Thermal resistance 150 °C/W Listed under temperature range; no conditions printed 6
Junction-to-ambient thermal resistance RθJA 107.1 °C/W D (SOIC), 8 pins 5
Junction-to-case (top) thermal resistance RθJC(top) 48.8 °C/W D (SOIC), 8 pins 5
Junction-to-board thermal resistance RθJB 48.3 °C/W D (SOIC), 8 pins 5
Junction-to-top characterization parameter ψJT 6.8 °C/W D (SOIC), 8 pins 5
Junction-to-board characterization parameter ψJB 47.6 °C/W D (SOIC), 8 pins 5

CAD (KiCad official)

  • Symbol: REF5040AQDRQ1
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ref5040aqdrq1-etched.step / ref5040aqdrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ref5040aqdrq1.step / ref5040aqdrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 908e1bb3275e2398, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF