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74VHCT540AFT
Public Made by Adomby adom
TOSHIBA Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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Datasheet
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README
markdown74VHCT540AFT
TOSHIBA · Buffers, Drivers, Receivers, Transceivers · TSSOP-20
74VHCT540AFT from TOSHIBA, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G1 | input | Active-low output enable 1; when G1 or G2 is high the outputs are in the high-impedance state. |
| 2 | A1 | input | Data input 1; inputs are TTL-compatible (VIL 0.8 V max, VIH 2.0 V min) and tolerate 0 to 5.5 V. |
| 3 | A2 | input | Data input 2; inputs are TTL-compatible (VIL 0.8 V max, VIH 2.0 V min) and tolerate 0 to 5.5 V. |
| 4 | A3 | input | Data input 3; inputs are TTL-compatible (VIL 0.8 V max, VIH 2.0 V min) and tolerate 0 to 5.5 V. |
| 5 | A4 | input | Data input 4; inputs are TTL-compatible (VIL 0.8 V max, VIH 2.0 V min) and tolerate 0 to 5.5 V. |
| 6 | A5 | input | Data input 5; inputs are TTL-compatible (VIL 0.8 V max, VIH 2.0 V min) and tolerate 0 to 5.5 V. |
| 7 | A6 | input | Data input 6; inputs are TTL-compatible (VIL 0.8 V max, VIH 2.0 V min) and tolerate 0 to 5.5 V. |
| 8 | A7 | input | Data input 7; inputs are TTL-compatible (VIL 0.8 V max, VIH 2.0 V min) and tolerate 0 to 5.5 V. |
| 9 | A8 | input | Data input 8; inputs are TTL-compatible (VIL 0.8 V max, VIH 2.0 V min) and tolerate 0 to 5.5 V. |
| 10 | GND | power_in | Ground (0 V) reference. |
| 11 | Y8 | tri_state | Inverted 3-state output 8 (inverse of A8); high-impedance when G1 or G2 is high. |
| 12 | Y7 | tri_state | Inverted 3-state output 7 (inverse of A7); high-impedance when G1 or G2 is high. |
| 13 | Y6 | tri_state | Inverted 3-state output 6 (inverse of A6); high-impedance when G1 or G2 is high. |
| 14 | Y5 | tri_state | Inverted 3-state output 5 (inverse of A5); high-impedance when G1 or G2 is high. |
| 15 | Y4 | tri_state | Inverted 3-state output 4 (inverse of A4); high-impedance when G1 or G2 is high. |
| 16 | Y3 | tri_state | Inverted 3-state output 3 (inverse of A3); high-impedance when G1 or G2 is high. |
| 17 | Y2 | tri_state | Inverted 3-state output 2 (inverse of A2); high-impedance when G1 or G2 is high. |
| 18 | Y1 | tri_state | Inverted 3-state output 1 (inverse of A1); high-impedance when G1 or G2 is high. |
| 19 | G2 | input | Active-low output enable 2; when G1 or G2 is high the outputs are in the high-impedance state. |
| 20 | VCC | power_in | Supply voltage, operating range 4.5 to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | TSSOP-20 |
| Category | Logic |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage (absolute max) | VIN | -0.5 | 7 | V | 3 | ||
| Supply voltage (absolute max) | VCC | -0.5 | 7 | V | 3 | ||
| Output voltage (absolute max) | VOUT | -0.5 | 7 | V | Output in OFF state (Note1) | 3 | |
| Output voltage (absolute max) | VOUT | -0.5 | V | High or Low state (Note2); upper limit printed as VCC + 0.5 | 3 | ||
| Input diode current | IIK | -20 | mA | Printed as single value -20 | 3 | ||
| Output diode current | IOK | -20 | 20 | mA | VOUT < GND, VOUT > VCC (Note3) | 3 | |
| Output current | IOUT | -25 | 25 | mA | High or Low state (Note2) | 3 | |
| VCC/ground current | ICC | -75 | 75 | mA | 3 | ||
| Power dissipation | PD | 180 | mW | Ta = -40 to 85°C; derate -3.25 mW/°C from 85 to 125°C until 50 mW (Note4) | 3 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Supply voltage (operating) | VCC | 4.5 | 5.5 | V | 4 | ||
| Input voltage (operating) | VIN | 0 | 5.5 | V | 4 | ||
| Output voltage (operating) | VOUT | 0 | 5.5 | V | Output in OFF state (Note1) | 4 | |
| Output voltage (operating) | VOUT | 0 | V | High or Low state (Note2); upper limit printed as VCC | 4 | ||
| Operating temperature | Topr | -40 | 125 | °C | 4 | ||
| Input rise and fall times | dt/dv | 0 | 20 | ns/V | 4 | ||
| High-level input voltage | VIH | 2 | V | Ta = 25°C; VCC = 4.5 to 5.5 V | 4 | ||
| Low-level input voltage | VIL | 0.8 | V | Ta = 25°C; VCC = 4.5 to 5.5 V | 4 | ||
| High-level output voltage | VOH | 4.4 | 4.5 | V | Ta = 25°C; VIN = VIH or VIL; IOH = -50 µA; VCC = 4.5 V | 4 | |
| High-level output voltage | VOH | 3.94 | V | Ta = 25°C; VIN = VIH or VIL; IOH = -8 mA; VCC = 4.5 V | 4 | ||
| Low-level output voltage | VOL | 0 | 0.1 | V | Ta = 25°C; VIN = VIH or VIL; IOL = 50 µA; VCC = 4.5 V | 4 | |
| Low-level output voltage | VOL | 0.36 | V | Ta = 25°C; VIN = VIH or VIL; IOL = 8 mA; VCC = 4.5 V | 4 | ||
| 3-state output OFF-state leakage current | IOZ | -0.25 | 0.25 | µA | Ta = 25°C; VOUT = VCC or GND; VCC = 5.5 V | 4 | |
| Input leakage current | IIN | -0.1 | 0.1 | µA | Ta = 25°C; VIN = 5.5 V or GND | 4 | |
| Quiescent supply current | ICC | 4 | µA | Ta = 25°C; VIN = VCC or GND; VCC = 5.5 V | 4 | ||
| Quiescent supply current (additional, TTL input) | ICCT | 1.35 | mA | Ta = 25°C; per input VIN = 3.4 V; other input VCC or GND; VCC = 5.5 V | 4 | ||
| Output leakage current (Power-OFF) | IOPD | 0.5 | µA | Ta = 25°C; VOUT = 5.5 V; VCC = 0 V | 4 | ||
| High-level output voltage | VOH | 4.4 | V | Ta = -40 to 85°C; VIN = VIH or VIL; IOH = -50 µA; VCC = 4.5 V | 4 | ||
| High-level output voltage | VOH | 3.8 | V | Ta = -40 to 85°C; VIN = VIH or VIL; IOH = -8 mA; VCC = 4.5 V | 4 | ||
| Low-level output voltage | VOL | 0.1 | V | Ta = -40 to 85°C; VIN = VIH or VIL; IOL = 50 µA; VCC = 4.5 V | 4 | ||
| Low-level output voltage | VOL | 0.44 | V | Ta = -40 to 85°C; VIN = VIH or VIL; IOL = 8 mA; VCC = 4.5 V | 4 | ||
| 3-state output OFF-state leakage current | IOZ | -2.5 | 2.5 | µA | Ta = -40 to 85°C; VOUT = VCC or GND; VCC = 5.5 V | 4 | |
| Input leakage current | IIN | -1 | 1 | µA | Ta = -40 to 85°C; VIN = 5.5 V or GND | 4 | |
| Quiescent supply current | ICC | 40 | µA | Ta = -40 to 85°C; VIN = VCC or GND; VCC = 5.5 V | 4 | ||
| Quiescent supply current (additional, TTL input) | ICCT | 1.5 | mA | Ta = -40 to 85°C; per input VIN = 3.4 V; other input VCC or GND; VCC = 5.5 V | 4 | ||
| Output leakage current (Power-OFF) | IOPD | 5 | µA | Ta = -40 to 85°C; VOUT = 5.5 V; VCC = 0 V | 4 | ||
| High-level input voltage | VIH | 2 | V | Ta = -40 to 125°C; VCC = 4.5 to 5.5 V | 5 | ||
| Low-level input voltage | VIL | 0.8 | V | Ta = -40 to 125°C; VCC = 4.5 to 5.5 V | 5 | ||
| High-level output voltage | VOH | 4.4 | V | Ta = -40 to 125°C; VIN = VIH or VIL; IOH = -50 µA; VCC = 4.5 V | 5 | ||
| High-level output voltage | VOH | 3.7 | V | Ta = -40 to 125°C; VIN = VIH or VIL; IOH = -8 mA; VCC = 4.5 V | 5 | ||
| Low-level output voltage | VOL | 0.1 | V | Ta = -40 to 125°C; VIN = VIH or VIL; IOL = 50 µA; VCC = 4.5 V | 5 | ||
| Low-level output voltage | VOL | 0.55 | V | Ta = -40 to 125°C; VIN = VIH or VIL; IOL = 8 mA; VCC = 4.5 V | 5 | ||
| 3-state output OFF-state leakage current | IOZ | -10 | 10 | µA | Ta = -40 to 125°C; VOUT = VCC or GND; VCC = 5.5 V | 5 | |
| Input leakage current | IIN | -2 | 2 | µA | Ta = -40 to 125°C; VIN = 5.5 V or GND | 5 | |
| Quiescent supply current | ICC | 80 | µA | Ta = -40 to 125°C; VIN = VCC or GND; VCC = 5.5 V | 5 | ||
| Quiescent supply current (additional, TTL input) | ICCT | 1.5 | mA | Ta = -40 to 125°C; per input VIN = 3.4 V; other input VCC or GND; VCC = 5.5 V | 5 | ||
| Output leakage current (Power-OFF) | IOPD | 20 | µA | Ta = -40 to 125°C; VOUT = 5.5 V; VCC = 0 V | 5 | ||
| Propagation delay time (tPLH,tPHL) | tPLH,tPHL | 5.4 | 7.4 | ns | Ta = 25°C; VCC = 5.0 ± 0.5 V; CL = 15 pF; RL = 1 kΩ | 5 | |
| Propagation delay time (tPLH,tPHL) | tPLH,tPHL | 5.9 | 8.4 | ns | Ta = 25°C; VCC = 5.0 ± 0.5 V; CL = 50 pF; RL = 1 kΩ | 5 | |
| 3-state output enable time (tPZL,tPZH) | tPZL,tPZH | 8.3 | 11.3 | ns | Ta = 25°C; VCC = 5.0 ± 0.5 V; CL = 15 pF; RL = 1 kΩ | 5 | |
| 3-state output enable time (tPZL,tPZH) | tPZL,tPZH | 8.8 | 12.3 | ns | Ta = 25°C; VCC = 5.0 ± 0.5 V; CL = 50 pF; RL = 1 kΩ | 5 | |
| 3-state output disable time (tPLZ,tPHZ) | tPLZ,tPHZ | 9.4 | 11.9 | ns | Ta = 25°C; VCC = 5.0 ± 0.5 V; CL = 50 pF; RL = 1 kΩ | 5 | |
| Output skew (tosLH,tosHL) | tosLH,tosHL | 1 | ns | Ta = 25°C; VCC = 5.0 ± 0.5 V; CL = 50 pF | 5 | ||
| Input capacitance | CIN | 10 | pF | Ta = 25°C | 5 | ||
| Propagation delay time (tPLH,tPHL) | tPLH,tPHL | 1 | 8.5 | ns | Ta = -40 to 85°C; VCC = 5.0 ± 0.5 V; CL = 15 pF; RL = 1 kΩ | 5 | |
| Propagation delay time (tPLH,tPHL) | tPLH,tPHL | 1 | 9.5 | ns | Ta = -40 to 85°C; VCC = 5.0 ± 0.5 V; CL = 50 pF; RL = 1 kΩ | 5 | |
| Propagation delay time (tPLH,tPHL) | tPLH,tPHL | 1 | 9.5 | ns | Ta = -40 to 125°C; VCC = 5.0 ± 0.5 V; CL = 15 pF; RL = 1 kΩ | 6 | |
| Propagation delay time (tPLH,tPHL) | tPLH,tPHL | 1 | 10.5 | ns | Ta = -40 to 125°C; VCC = 5.0 ± 0.5 V; CL = 50 pF; RL = 1 kΩ | 6 |
CAD (KiCad official)
- Symbol:
74VHCT540AFT - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
74vhct540aft-etched.step/74vhct540aft-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74vhct540aft.step/74vhct540aft.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TOSHIBA datasheet (8 pp, sha256
3a3485b289292fb2, retrieved 2026-10-16, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).