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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

TPS65010RGZR

Texas Instruments · Battery Management · VQFN-48-EP(7x7)

TPS65010RGZR from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	DEFCORE	input	Input signal that sets the default VCORE voltage: 0 = 1.5 V, 1 = 1.6 V.
2	LED2	output	LED driver output with a blink rate programmable through the serial interface.
3	VIB	output	Vibrator driver output, enabled through the serial interface.
4	L2	passive	Switch pin of the VCORE step-down converter; the VCORE inductor is connected here.
5	VINCORE	power_in	Input voltage for the VCORE step-down converter; must be connected to the same supply as VINMAIN and VCC.
6	VCC	power_in	Supply for the digital and analog circuitry of the MAIN and CORE converters and the serial interface block, rated 2.5 V to 6.0 V and to be connected to the same supply as VINCORE and VINMAIN.
7	VINMAIN_A	power_in	Input voltage for the VMAIN step-down converter; must be connected to the same supply as VINCORE and VCC.
8	VINMAIN_B	power_in	Input voltage for the VMAIN step-down converter; must be connected to the same supply as VINCORE and VCC.
9	L1_A	passive	Switch pin of the VMAIN converter; the VMAIN inductor is connected here.
10	L1_B	passive	Switch pin of the VMAIN converter; the VMAIN inductor is connected here.
11	PG	output	Open-drain output that indicates when a valid power supply is present for the charger.
12	DEFMAIN	input	Input signal that sets the default VMAIN voltage: 0 = 3.0 V, 1 = 3.3 V.
13	VMAIN	input	VMAIN feedback voltage sense input; connect directly to VMAIN.
14	PS_SEQ	input	Sets the power-up/down sequence of the step-down converters: PS_SEQ = 0 ramps the core first and down last, PS_SEQ = 1 ramps the main regulator first and down last.
15	PGND1_A	power_in	Power ground for the VMAIN converter.
16	PGND1_B	power_in	Power ground for the VMAIN converter.
17	GPIO4	bidirectional	General-purpose open-drain input/output.
18	GPIO3	bidirectional	General-purpose open-drain input/output.
19	VINLDO2	power_in	Input voltage for LDO2, with an input range of 1.8 V to 6.5 V.
20	VLDO2	power_out	Output and feedback voltage for LDO2, with an output range of 0.9 V to VI(LDO1-2).
21	AGND1	power_in	Analog ground connection; all analog ground pins are connected internally on the chip.
22	VINLDO1	power_in	Input voltage for LDO1, with an input range of 1.8 V to 6.5 V.
23	VFB_LDO1	input	Feedback input from an external resistive divider for LDO1.
24	VLDO1	power_out	Output voltage for LDO1, monitored by a power-good comparator that generates the RESPWRON system reset.
25	GPIO2	bidirectional	General-purpose open-drain input/output.
26	GPIO1	bidirectional	General-purpose open-drain input/output.
27	NC	unconnected	No internal connection; the datasheet specifies that this pin be connected to GND.
28	IFLSB	input	LSB of the serial interface address, used to distinguish two devices with the same address.
29	SDAT	bidirectional	Serial interface data/address line.
30	SCLK	input	Serial interface clock line.
31	HOT_RESET	input	Push-button reset input used to reboot or wake up the processor through the TPS65010.
32	MPU_RESET	output	Open-drain processor reset output generated by a user-activated HOT_RESET.
33	RESPWRON	output	Open-drain system reset output generated according to the state of the LDO1 output voltage.
34	PWRFAIL	output	Open-drain output, active low when the UVLO comparator indicates a low VBAT condition, when shutdown is about to occur due to overtemperature, or when the battery cover is removed.
35	INT	output	Open-drain output, active low, that indicates a charge fault or termination or that a regulator output is below its lower tolerance level.
36	LOW_PWR	input	Input signal indicating deep-sleep mode, in which VCORE is lowered to a predefined value or disabled.
37	ISET	input	External charge-current setting resistor connection for use with the AC adapter.
38	TS	input	Battery temperature sense input.
39	BATT_COVER	input	Indicates whether the battery cover is in place (VCC = in place, 0 = not in place); when it goes low the main and core converters are shut down.
40	AC	input	Charger input voltage from the AC adapter; can be left open or connected to ground if the charger is not used.
41	VBAT_A	input	Sense input for the battery voltage; connect directly with the battery.
42	VBAT_B	power_out	Power output of the battery charger; connect directly with the battery.
43	USB	input	Charger input voltage from the USB port; can be left open or connected to ground if the charger is not used.
44	AGND2	power_in	Analog ground connection; all analog ground pins are connected internally on the chip.
45	AGND3	power_in	Analog ground connection; all analog ground pins are connected internally on the chip.
46	PGND2	power_in	Power ground for the VCORE converter.
47	PB_ONOFF	input	Push-button enable pin, also used to wake up the processor from low-power mode.
48	VCORE	power_in	VCORE feedback voltage sense input; connect directly to VCORE.
49	Thermal pad	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VQFN-48-EP(7x7)
Category	Power Management (PMIC)
Pins	49

CAD (KiCad official)

Symbol: TPS65010RGZR
Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
3D model files: tps65010rgzr-etched.step / tps65010rgzr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps65010rgzr.step / tps65010rgzr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (64 pp, sha256 e42966d0d03accdf, retrieved 2026-10-11, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF