LT1028CS8#TRPBF from Analog Devices, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VOS TRIM	passive	Offset voltage trim pin, used with pin 5 to null input offset voltage (datasheet specifies 10µV typical offset for this part).
2	-IN	input	Inverting input; the LT1028 is gain of -1 stable and the input common-mode range is ±11.0V minimum at 25°C.
3	+IN	input	Non-inverting input; input voltage range is ±11.0V minimum at 25°C with VS = ±15V.
4	V-	power_in	Negative supply rail; the absolute maximum supply voltage is ±22V (−55°C to 105°C).
5	VOS TRIM	passive	Second offset voltage trim pin, connected with pin 1 to the offset null network.
6	OUT	output	Amplifier output; maximum output swing is ±12.2V into RL ≥ 600Ω and ±13.0V into RL ≥ 2k at 25°C.
7	V+	power_in	Positive supply rail; the absolute maximum supply voltage is ±22V (−55°C to 105°C).
8	OVER-COMP	passive	Overcompensation pin used to set the amplifier's frequency compensation for the gain-stability option of the device.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	SO-8
Category	Amplifiers
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input Offset Voltage	VOS		20	80	µV		3
Input Offset Current	IOS		18	100	nA	VCM = 0V	3
Input Bias Current	IB		30	180	nA	VCM = 0V	3
Input Noise Voltage 0.1Hz to 10Hz	en		35	90	nVP-P	0.1Hz to 10Hz (Note 4)	3
Input Noise Voltage Density	en		1	1.9	nV/√Hz	fO = 10Hz (Note 5)	3
Input Noise Voltage Density	en		0.9	1.2	nV/√Hz	fO = 1000Hz, 100% Tested	3
Input Noise Current Density	in		4.7	12	pA/√Hz	fO = 10Hz (Notes 4 and 6)	3
Input Noise Current Density	in		1	1.8	pA/√Hz	fO = 1000Hz, 100% Tested	3
Input Voltage Range		11	12.2		V		3
Common Mode Rejection Ratio	CMRR	110	126		dB	VCM = ±11V	3
Power Supply Rejection Ratio	PSRR	110	132		dB	VS = ±4V to ±18V	3
Large-Signal Voltage Gain	AVOL	5	30		V/µV	RL ≥ 2k, VO = ±12V	3
Large-Signal Voltage Gain	AVOL	3.5	20		V/µV	RL ≥ 1k, VO = ±10V	3
Large-Signal Voltage Gain	AVOL	2	15		V/µV	RL ≥ 600Ω, VO = ±10V	3
Maximum Output Voltage Swing	VOUT	12	13		V	RL ≥ 2k	3
Maximum Output Voltage Swing	VOUT	10.5	12.2		V	RL ≥ 600Ω	3
Slew Rate	SR	11	15		V/µs	AVCL = -1 LT1028	3
Gain-Bandwidth Product	GBW	50	75		MHz	fO = 20kHz (Note 7) LT1028	3
Supply Current	IS		7.6	10.5	mA		3
Input Offset Voltage	VOS		30	125	µV	0°C ≤ TA ≤ 70°C	4
Average Input Offset Drift	ΔVOS/ΔTemp		0.2	1	µV/°C	0°C ≤ TA ≤ 70°C (Note 8)	4
Input Offset Current	IOS		22	130	nA	VCM = 0V, 0°C ≤ TA ≤ 70°C	4
Input Bias Current	IB		40	240	nA	VCM = 0V, 0°C ≤ TA ≤ 70°C	4
Input Voltage Range		10.5	12		V	0°C ≤ TA ≤ 70°C	4
Common Mode Rejection Ratio	CMRR	106	124		dB	VCM = ±10.5V, 0°C ≤ TA ≤ 70°C	4
Power Supply Rejection Ratio	PSRR	107	132		dB	VS = ±4.5V to ±18V, 0°C ≤ TA ≤ 70°C	4
Large-Signal Voltage Gain	AVOL	3	25		V/µV	RL ≥ 2k, VO = ±10V, 0°C ≤ TA ≤ 70°C	4
Large-Signal Voltage Gain	AVOL	2.5	18		V/µV	RL ≥ 1k, VO = ±10V, 0°C ≤ TA ≤ 70°C	4
Maximum Output Voltage Swing	VOUT	11.5	12.7		V	RL ≥ 2k, 0°C ≤ TA ≤ 70°C	4
Maximum Output Voltage Swing	VOUT	9	10.5		V	RL ≥ 600Ω (Note 10), 0°C ≤ TA ≤ 70°C	4
Supply Current	IS		8.2	11.5	mA	0°C ≤ TA ≤ 70°C	4
Input Offset Voltage Long Term Stability	ΔVOS/ΔTime		0.3		µV/Mo		3
Input Resistance Common Mode			300		MΩ		3
Input Resistance Differential Mode			20		kΩ		3
Input Capacitance			5		pF		3
Open-Loop Output Impedance	ZO		80		Ω	VO = 0, IO = 0	3
Supply Voltage	VS			22	V	−55°C to 105°C (total supply, ±22V)	2
Differential Input Current				25	mA	Note 9	2
Storage Temperature Range	TSTG	-65		150	°C	All devices	2
Lead Temperature				300	°C	Soldering, 10 sec.	2
Operating Temperature Range	TA	-40		85	°C	LT1028C (Note 11)	2
Maximum Junction Temperature	TJMAX			150	°C	S8 package	2
Thermal Resistance Junction to Ambient	θJA			140	°C/W	S8 package	2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts		tin	NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE (1.143, 1.651) OR TIN PLATE LEADS	22

CAD (KiCad official)

Symbol: LT1028CS8#TRPBF
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SO-8 (KiCad packages3D, STEP)
3D model files: lt1028cs8-trpbf-etched.step / lt1028cs8-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt1028cs8-trpbf.step / lt1028cs8-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (28 pp, sha256 27731e02a9b187d0, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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