component
TLV76118DCYR
Public Made by Adomby adom
Texas Instruments , SOT-223-4. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownTLV76118DCYR
Texas Instruments · IC · SOT-223-4
TLV76118DCYR from Texas Instruments, in a SOT-223-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin. |
| 2 | OUT | power_out | Output pin; use the recommended output capacitor value from the Recommended Operating Conditions table (1µF min, 2.2µF nominal, 220µF max) and place it as close to the OUT and GND pins as possible. |
| 3 | IN | power_in | Input pin (2.5V to 18V); use the recommended input capacitor (1µF) from the Recommended Operating Conditions table, placed as close to the IN and GND pins as possible. |
| 4 | OUT | power_out | Tab, internally connected to the output (OUT); same function as pin 2, the output pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-223-4 |
| Category | |
| Pins | 4 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Nominal output accuracy | VOUT | -1 | 1 | % | TJ = 25°C | 5 | |
| Output accuracy over temperature | VOUT | -1.75 | 1.75 | % | VIN ≥ 3.0V, VOUT(NOM) ≤ 9.0V, 1mA ≤ IOUT ≤ 1A | 5 | |
| Load regulation | ΔVOUT(ΔIOUT) | 0.1 | 0.75 | %/A | 1mA ≤ IOUT ≤ 1A, VIN ≥ 3.0V | 5 | |
| Dropout voltage | VDO | 0.9 | 1.6 | V | VIN ≥ 3.0V, IOUT = 1A | 5 | |
| Output current limit | ICL | 1.1 | 1.6 | A | VOUT = 0.9 x VOUT(NOM), VIN ≥ 3.0V | 5 | |
| Short-circuit current limit | ISC | 150 | 250 | 350 | mA | VOUT = 0V | 5 |
| Quiescent current | IQ | 65 | 100 | µA | IOUT = 0mA | 5 | |
| Output pulldown current | IPULLDOWN | 0.7 | 1.1 | mA | VIN = 1.8V, VOUT = 2.5V | 5 | |
| UVLO threshold rising | VUVLO+ | 2.2 | 2.4 | V | VIN rising | 5 | |
| Line regulation | ΔVOUT(ΔVIN) | 0.02 | %/V | VOUT(NOM) ≤ 9.0V, VOUT(NOM) + 1.5V ≤ VIN ≤ 18V, IOUT = 10mA | 5 | ||
| Power-supply rejection ratio | PSRR | 70 | dB | VIN = 3.3V, VOUT = 1.8V, IOUT = 300mA, f = 120Hz | 5 | ||
| Output noise voltage | Vn | 60 | µVRMS | BW = 10Hz to 100kHz, VIN = 3.3V, VOUT = 0.8V, IOUT = 100mA | 5 | ||
| UVLO hysteresis | VUVLO(HYS) | 130 | mV | 5 | |||
| UVLO threshold falling | VUVLO- | 1.9 | V | VIN falling | 5 | ||
| Thermal shutdown temperature | TSD(shutdown) | 180 | ºC | Temperature increasing | 5 | ||
| Thermal shutdown reset temperature | TSD(reset) | 160 | ºC | Temperature falling | 5 | ||
| Input voltage (abs max) | VIN | -0.3 | 20 | V | 4 | ||
| Output voltage (abs max) | VOUT | -0.3 | V | max is VIN + 0.3 (or 18 V, whichever is smaller) | 4 | ||
| Operating junction temperature (abs max) | TJ | -50 | 150 | °C | 4 | ||
| Storage temperature | TSTG | -65 | 150 | °C | 4 | ||
| ESD HBM | V(ESD) | -3000 | 3000 | V | HBM, all pins | 4 | |
| ESD CDM | V(ESD) | -1000 | 1000 | V | CDM, all pins | 4 | |
| Input voltage | VIN | 2.5 | 18 | V | 4 | ||
| Output voltage | VOUT | 0.8 | 13.5 | V | 4 | ||
| Output current | IOUT | 0 | 0.8 | A | 2.5 V ≤ VIN < 3 V | 4 | |
| Output current | IOUT | 0 | 1 | A | VIN ≥ 3 V | 4 | |
| Output capacitor ESR | COUT ESR | 2 | 500 | mΩ | 4 | ||
| Output capacitor | COUT | 1 | 2.2 | 220 | µF | 4 | |
| Input capacitor | CIN | 1 | µF | 4 | |||
| Junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 95.4 | °C/W | DCY (SOT-223) | 5 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 55.6 | °C/W | DCY (SOT-223) | 5 | ||
| Junction-to-board thermal resistance | RθJB | 33.7 | °C/W | DCY (SOT-223) | 5 | ||
| Junction-to-top characterization parameter | ΨJT | 13.9 | °C/W | DCY (SOT-223) | 5 | ||
| Junction-to-board characterization parameter | ΨJB | 33.4 | °C/W | DCY (SOT-223) | 5 |
CAD (KiCad official)
- Symbol:
TLV76118DCYR - Footprint:
Package_TO_SOT_SMD:SOT-223 - 3D model: SOT-223-4 (KiCad packages3D, STEP)
- 3D model files:
tlv76118dcyr-etched.step/tlv76118dcyr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tlv76118dcyr.step/tlv76118dcyr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (32 pp, sha256
fb909a9169d6d479, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).