component
74AHCV541APWJ
Public Made by Adomby adom
Nexperia Logic ICs, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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README
markdown74AHCV541APWJ
Nexperia · Logic ICs · TSSOP-20
74AHCV541APWJ from Nexperia, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE1 | input | Output enable input, active LOW; a HIGH level forces the outputs to the high-impedance OFF-state per the functional table. |
| 2 | A0 | input | Data input with Schmitt trigger; overvoltage tolerant, recommended input range 0 V to 5.5 V and absolute maximum 7.0 V. |
| 3 | A1 | input | Data input with Schmitt trigger; overvoltage tolerant, recommended input range 0 V to 5.5 V and absolute maximum 7.0 V. |
| 4 | A2 | input | Data input with Schmitt trigger; overvoltage tolerant, recommended input range 0 V to 5.5 V and absolute maximum 7.0 V. |
| 5 | A3 | input | Data input with Schmitt trigger; overvoltage tolerant, recommended input range 0 V to 5.5 V and absolute maximum 7.0 V. |
| 6 | A4 | input | Data input with Schmitt trigger; overvoltage tolerant, recommended input range 0 V to 5.5 V and absolute maximum 7.0 V. |
| 7 | A5 | input | Data input with Schmitt trigger; overvoltage tolerant, recommended input range 0 V to 5.5 V and absolute maximum 7.0 V. |
| 8 | A6 | input | Data input with Schmitt trigger; overvoltage tolerant, recommended input range 0 V to 5.5 V and absolute maximum 7.0 V. |
| 9 | A7 | input | Data input with Schmitt trigger; overvoltage tolerant, recommended input range 0 V to 5.5 V and absolute maximum 7.0 V. |
| 10 | GND | power_in | Ground (0 V); all voltage ratings are referenced to this pin. |
| 11 | Y7 | tri_state | 3-state data output; high-impedance when OE1 or OE2 is HIGH, with output current limited to ±50 mA. |
| 12 | Y6 | tri_state | 3-state data output; high-impedance when OE1 or OE2 is HIGH, with output current limited to ±50 mA. |
| 13 | Y5 | tri_state | 3-state data output; high-impedance when OE1 or OE2 is HIGH, with output current limited to ±50 mA. |
| 14 | Y4 | tri_state | 3-state data output; high-impedance when OE1 or OE2 is HIGH, with output current limited to ±50 mA. |
| 15 | Y3 | tri_state | 3-state data output; high-impedance when OE1 or OE2 is HIGH, with output current limited to ±50 mA. |
| 16 | Y2 | tri_state | 3-state data output; high-impedance when OE1 or OE2 is HIGH, with output current limited to ±50 mA. |
| 17 | Y1 | tri_state | 3-state data output; high-impedance when OE1 or OE2 is HIGH, with output current limited to ±50 mA. |
| 18 | Y0 | tri_state | 3-state data output; high-impedance when OE1 or OE2 is HIGH, with output current limited to ±50 mA. |
| 19 | OE2 | input | Output enable input, active LOW; a HIGH level forces the outputs to the high-impedance OFF-state per the functional table. |
| 20 | VCC | power_in | Supply voltage; recommended operating range 1.8 V to 5.5 V, absolute maximum 7.0 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-20 |
| Category | Logic ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC supply voltage | VCC | -0.5 | 7 | V | 3 | ||
| input voltage | VI | -0.5 | 7 | V | 3 | ||
| output voltage active mode | VO | -0.5 | V | active mode | 3 | ||
| output voltage power-down or 3-state mode | VO | -0.5 | 7 | V | power-down or 3-state mode | 3 | |
| input clamping current | IIK | -50 | mA | VI < 0 V | 3 | ||
| output clamping current | IOK | -50 | mA | VO < 0 V | 3 | ||
| output current | IO | -50 | 50 | mA | VO = 0 V to VCC | 3 | |
| supply current | ICC | 100 | mA | 3 | |||
| ground current | IGND | -100 | mA | 3 | |||
| storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| total power dissipation | Ptot | 500 | mW | Tamb = -40 °C to +125 °C | 3 | ||
| supply voltage | VCC | 1.8 | 5.5 | V | 4 | ||
| input voltage | VI | 0 | 5.5 | V | 4 | ||
| output voltage active mode | VO | 0 | V | active mode | 4 | ||
| output voltage power-down or 3-state mode | VO | 0 | 5.5 | V | power-down or 3-state mode | 4 | |
| ambient temperature | Tamb | -40 | 125 | °C | 4 | ||
| input transition rise and fall rate | Δt/ΔV | 50 | ms/V | VCC = 2.3 V to 2.7 V | 4 | ||
| input transition rise and fall rate | Δt/ΔV | 20 | ms/V | VCC = 3.0 V to 3.6 V | 4 | ||
| input transition rise and fall rate | Δt/ΔV | 1 | ms/V | VCC = 4.5 V to 5.5 V | 4 | ||
| positive-going threshold voltage | VT+ | 1.65 | V | VCC = 1.8 V | 4 | ||
| positive-going threshold voltage | VT+ | 1.85 | V | VCC = 2.3 V | 4 | ||
| positive-going threshold voltage | VT+ | 2.2 | V | VCC = 3.0 V | 4 | ||
| positive-going threshold voltage | VT+ | 3.15 | V | VCC = 4.5 V | 4 | ||
| positive-going threshold voltage | VT+ | 3.85 | V | VCC = 5.5 V | 4 | ||
| negative-going threshold voltage | VT- | 0.15 | V | VCC = 1.8 V | 4 | ||
| negative-going threshold voltage | VT- | 0.45 | V | VCC = 2.3 V | 4 | ||
| negative-going threshold voltage | VT- | 0.9 | V | VCC = 3.0 V | 4 | ||
| negative-going threshold voltage | VT- | 1.35 | V | VCC = 4.5 V | 4 | ||
| negative-going threshold voltage | VT- | 1.65 | V | VCC = 5.5 V | 4 | ||
| hysteresis voltage | VH | 0.15 | 1.05 | V | VCC = 1.8 V | 4 | |
| hysteresis voltage | VH | 0.2 | 1.1 | V | VCC = 2.3 V | 4 | |
| hysteresis voltage | VH | 0.3 | 1.2 | V | VCC = 3.0 V | 4 | |
| hysteresis voltage | VH | 0.4 | 1.4 | V | VCC = 4.5 V | 4 | |
| hysteresis voltage | VH | 0.5 | 1.6 | V | VCC = 5.5 V | 4 | |
| HIGH-level output voltage | VOH | 1.7 | 1.8 | V | VI = VT+ or VT-; IO = -50 μA; VCC = 1.8 V | 4 | |
| HIGH-level output voltage | VOH | 2.9 | 3 | V | VI = VT+ or VT-; IO = -50 μA; VCC = 3.0 V | 4 | |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | VI = VT+ or VT-; IO = -50 μA; VCC = 4.5 V | 4 | |
| HIGH-level output voltage | VOH | 2.48 | V | VI = VT+ or VT-; IO = -8 mA; VCC = 3.0 V | 4 | ||
| HIGH-level output voltage | VOH | 3.8 | V | VI = VT+ or VT-; IO = -16 mA; VCC = 4.5 V | 4 | ||
| LOW-level output voltage | VOL | 0 | 0.1 | V | VI = VT+ or VT-; IO = 50 μA; VCC = 1.8 V | 5 | |
| LOW-level output voltage | VOL | 0.44 | V | VI = VT+ or VT-; IO = 8 mA; VCC = 3.0 V | 5 | ||
| LOW-level output voltage | VOL | 0.55 | V | VI = VT+ or VT-; IO = 16 mA; VCC = 4.5 V | 5 | ||
| OFF-state output current | IOZ | -2.5 | 2.5 | μA | VCC = 1.8 V to 5.5 V; VI = VIH or VIL; VO = GND to 5.5 V | 5 | |
| power-off leakage current | IOFF | 5 | μA | VI or VO = GND to 5.5 V; VCC = 0 V | 5 | ||
| input leakage current | II | -1 | 1 | μA | VI = VCC or GND; VCC = 0 V to 5.5 V | 5 | |
| supply current | ICC | 20 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V | 5 | ||
| propagation delay | tpd | 1 | 5.1 | 13.5 | ns | An to Yn; see Fig. 6; VCC = 2.3 V to 2.7 V; CL = 15 pF | 7 |
| propagation delay | tpd | 1 | 7 | 18.5 | ns | An to Yn; see Fig. 6; VCC = 2.3 V to 2.7 V; CL = 50 pF | 7 |
| propagation delay | tpd | 1 | 3.9 | 8.5 | ns | An to Yn; see Fig. 6; VCC = 3.0 V to 3.6 V; CL = 15 pF | 7 |
| propagation delay | tpd | 1 | 5.4 | 12 | ns | An to Yn; see Fig. 6; VCC = 3.0 V to 3.6 V; CL = 50 pF | 7 |
| propagation delay | tpd | 1 | 3 | 6 | ns | An to Yn; see Fig. 6; VCC = 4.5 V to 5.5 V; CL = 15 pF | 7 |
| propagation delay | tpd | 1 | 4.2 | 8 | ns | An to Yn; see Fig. 6; VCC = 4.5 V to 5.5 V; CL = 50 pF | 7 |
| enable time | ten | 1 | 3.2 | 8.5 | ns | OEn to Yn; see Fig. 7; VCC = 4.5 V to 5.5 V; CL = 15 pF | 7 |
| enable time | ten | 1 | 4.5 | 10.5 | ns | OEn to Yn; see Fig. 7; VCC = 4.5 V to 5.5 V; CL = 50 pF | 7 |
| disable time | tdis | 1 | 4.3 | 9.5 | ns | OEn to Yn; see Fig. 7; VCC = 4.5 V to 5.5 V; CL = 15 pF | 7 |
| disable time | tdis | 1 | 6.5 | 11.5 | ns | OEn to Yn; see Fig. 7; VCC = 4.5 V to 5.5 V; CL = 50 pF | 7 |
| output skew | tsk(o) | 1 | ns | CL = 50 pF; VCC = 4.5 V to 5.5 V | 7 | ||
| input capacitance | CI | 2 | 6 | pF | VI = VCC or GND; VCC = 3.3 V | 8 |
CAD (KiCad official)
- Symbol:
74AHCV541APWJ - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
74ahcv541apwj-etched.step/74ahcv541apwj-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74ahcv541apwj.step/74ahcv541apwj.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (15 pp, sha256
e11137b3141d175d, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).