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INA203AIPWR

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Texas Instruments Current-Sensing Amplifiers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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INA203AIPWR

Texas Instruments · Current-Sensing Amplifiers · TSSOP-14

INA203AIPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VS power_in Power supply pin, operating range 2.7 V to 18 V.
2 OUT output Current-shunt monitor analog output voltage, limited to GND - 0.3 V to VS + 0.3 V.
3 CMP1 IN-/0.6V REF input Comparator 1 negative input, can be used to override the internal 0.6-V reference.
4 CMP1 IN+ input Comparator 1 positive input.
5 CMP2 IN+ input Comparator 2 positive input.
6 CMP2 IN-/0.6V REF input Comparator 2 negative input, can be used to override the internal 0.6-V reference.
7 GND power_in Ground.
8 CMP1 RESET input Comparator 1 output reset, active low.
9 CMP2 DELAY passive Connect an optional capacitor to adjust comparator 2 delay.
10 CMP2 OUT output Comparator 2 open-drain output, up to 18 V maximum.
11 CMP1 OUT output Comparator 1 open-drain output (latching), up to 18 V maximum.
12 1.2V REF OUT output 1.2-V reference output.
13 VIN- power_in Connect to shunt low side; common-mode range -16 V to 80 V.
14 VIN+ power_in Connect to shunt high side; common-mode range -16 V to 80 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Amplifiers
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (abs max) VS 18 V 5
Differential input voltage (abs max) VIN+, VIN- -18 18 V Differential 5
Common-mode input voltage (abs max) VCM -16 80 V Common-mode, VIN+ and VIN- 5
Comparator output voltage (abs max) 18 V Comparator output, min GND, 0.3 5
VREF and CMP2 Delay pin voltage (abs max) 10 V min GND, 0.3 5
Input current into any pin (abs max) 5 mA 5
Operating temperature (abs max) -55 150 °C 5
Junction temperature (abs max) TJ -65 150 °C 5
Storage temperature Tstg -65 150 °C 5
Common-mode input voltage (recommended) VCM -16 12 80 V 5
Operating supply voltage (recommended) VS 2.7 12 18 V 5
Operating free-air temperature TA -40 25 125 °C 5
Junction-to-ambient thermal resistance RθJA 112.6 °C/W PW (TSSOP) 14 pins 5
Junction-to-case (top) thermal resistance RθJC(top) 37.2 °C/W PW (TSSOP) 14 pins 5
Junction-to-board thermal resistance RθJB 55.4 °C/W PW (TSSOP) 14 pins 5
Junction-to-top characterization parameter ψJT 2.7 °C/W PW (TSSOP) 14 pins 5
Junction-to-board characterization parameter ψJB 54.7 °C/W PW (TSSOP) 14 pins 5
Junction-to-case (bottom) thermal resistance RθJC(bot) 150 °C/W PW (TSSOP) 14 pins 5
Full-scale sense input voltage VSENSE 0.15 V VSENSE = VIN+, VIN-; max printed as (VS, 0.25)/Gain 6
Common-mode input range VCM -16 80 V TA = -40°C to 125°C 6
Common-mode rejection ratio CMRR 80 100 dB VCM = -16 V to 80 V 6
CMRR over temperature CMRR 100 123 dB VCM = 12 V to 80 V, TA = -40°C to 125°C 6
Offset voltage, RTI VOS -2.5 0.5 2.5 mV typ ±0.5, max ±2.5 6
Offset voltage, RTI, 25°C to 125°C VOS -3 3 mV 25°C to 125°C 6
Offset voltage, RTI, -40°C to 25°C VOS -3.5 3.5 mV -40°C to 25°C 6
Offset voltage drift, RTI dVOS/dT 5 μV/°C TA = -40°C to 125°C 6
Offset voltage vs power supply, RTI PSR 2.5 100 μV/V VOUT = 2 V, VCM = 18 V, 2.7 V, TA = -40°C to 125°C 6
Input bias current, VIN- pin IB -16 9 16 μA TA = -40°C to 125°C; typ ±9, max ±16 6
Gain G 20 V/V INA203 6
Gain error -1 0.2 1 % VSENSE = 20 mV to 100 mV; typ ±0.2%, max ±1% 6
Gain error over temperature -2 2 % VSENSE = 20 mV to 100 mV, TA = -40°C to 125°C 6
Total output error -2.2 0.75 2.2 % VSENSE = 120 mV, VS = 16 V; typ ±0.75%, max ±2.2% 6
Total output error over temperature -3.5 3.5 % VSENSE = 120 mV, VS = 16 V, TA = -40°C to 125°C 6
Nonlinearity error 0.002 % VSENSE = 20 mV to 100 mV; ±0.002% 6
Output impedance, pin 2 RO 1.5 Ω 6
Maximum capacitive load 10 nF No sustained oscillation 6
Output, VSENSE < 20 mV, negative VCM 300 mV -16 V ≤ VCM < 0 V 6
INA203 output, VSENSE < 20 mV 0.4 V 0 V ≤ VCM ≤ VS, VS = 5 V 6
Output, VSENSE < 20 mV, VCM above VS 300 mV VS < VCM ≤ 80 V 6
Bandwidth BW 500 kHz INA203; CLOAD = 5 pF 7
Slew rate SR 1 V/μs 7
Settling time (1%) 2 μs VSENSE = 10 mVPP to 100 mVPP, CLOAD = 5 pF 7
Output voltage noise density 40 nV/√Hz 7
Comparator offset voltage 2 mV Comparator common-mode voltage = threshold voltage 7
Offset voltage drift, comparator 1 -2 2 μV/°C TA = -40°C to 125°C 7
Offset voltage drift, comparator 2 5.4 μV/°C TA = -40°C to 125°C 7
Comparator threshold 590 608 620 mV TA = 25°C 7
Comparator threshold over temperature 586 625 mV TA = -40°C to 125°C 7
Hysteresis, CMP1 -8 mV TA = -40°C to 85°C 7
Hysteresis, CMP2 8 mV TA = -40°C to 85°C 7
Comparator input bias current 0.005 10 nA CMP1 IN+, CMP2 IN+ 7
Comparator input bias current vs temperature 15 nA CMP1 IN+, CMP2 IN+, TA = -40°C to 125°C 7
Large-signal differential voltage gain 200 V/mV CMP VOUT 1 V to 4 V, RL ≥ 15 kΩ connected to 5 V 7
High-level output current 0.0001 1 μA VID = 0.4 V, VOH = VS 8
Low-level output voltage 220 300 mV VID = -0.6 V, IOL = 2.35 mA 8
Comparator 1 response time 1.3 μs RL to 5 V, CL = 15 pF, 100-mV input step with 5-mV overdrive 8
1.2-V reference output voltage 1.188 1.2 1.212 V 9
Reference drift dVOUT/dT 40 100 ppm/°C TA = -40°C to 85°C 9
Reference load regulation, sourcing dVOUT/dILOAD 0.4 2 mV/mA 0 mA < ISOURCE < 0.5 mA 9
Operating power supply VS 2.7 18 V TA = -40°C to 125°C 9
Quiescent current IQ 1.8 2.2 mA VOUT = 2 V 9
Quiescent current over temperature IQ 2.8 mA VSENSE = 0 mV 9
Specified temperature -40 125 °C 9

CAD (KiCad official)

  • Symbol: INA203AIPWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: ina203aipwr-etched.step / ina203aipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ina203aipwr.step / ina203aipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (39 pp, sha256 0258939b915a8c9e, retrieved 2026-10-22, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF