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Contents

README

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CD4068BM96

Texas Instruments · Logic Gates · SOIC-14

CD4068BM96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 K output Buffered 8-input NAND output, K = NAND(A,B,C,D,E,F,G,H); drives to VOL/VOH limits per the static electrical characteristics table (e.g., VOL max 0.05V, VOH min 4.95V at VDD=5V).
2 A input Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max.
3 B input Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max.
4 C input Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max.
5 D input Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max.
6 NC unconnected No internal connection to the die; marked NC on the terminal assignment diagram.
7 VSS power_in Negative supply / ground reference terminal; all other pin voltages, including the -0.5V to VDD+0.5V input range, are referenced to this pin.
8 NC unconnected No internal connection to the die; marked NC on the terminal assignment diagram.
9 E input Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max.
10 F input Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max.
11 G input Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max.
12 H input Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max.
13 J output Buffered 8-input AND output, J = AND(A,B,C,D,E,F,G,H); drives to VOL/VOH limits per the static electrical characteristics table (e.g., VOL max 0.05V, VOH min 4.95V at VDD=5V).
14 VDD power_in Positive supply pin; absolute-maximum DC supply-voltage range is -0.5V to +20V referenced to VSS, with recommended operating supply-voltage range of 3V to 18V over the full package temperature range.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: CD4068BM96
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: cd4068bm96-etched.step / cd4068bm96-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4068bm96.step / cd4068bm96.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (20 pp, sha256 73f5f78780c4b47c, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (text+vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF