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SN74HC174N

Public Made by Adom

by adom

lingxingic Flip Flops, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Datasheet

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Contents

README

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SN74HC174N

lingxingic · Flip Flops · DIP-16

SN74HC174N from lingxingic, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 MR input Asynchronous master reset input, active LOW, which forces all Qn outputs LOW independent of the clock.
2 Q0 output Data output of flip-flop 0.
3 D0 input Data input of flip-flop 0, sampled on the LOW-to-HIGH clock transition.
4 D1 input Data input of flip-flop 1, sampled on the LOW-to-HIGH clock transition.
5 Q1 output Data output of flip-flop 1.
6 D2 input Data input of flip-flop 2, sampled on the LOW-to-HIGH clock transition.
7 Q2 output Data output of flip-flop 2.
8 GND power_in Ground (0 V) reference for all voltages.
9 CP input Clock input, triggered on the LOW-to-HIGH edge.
10 Q3 output Data output of flip-flop 3.
11 D3 input Data input of flip-flop 3, sampled on the LOW-to-HIGH clock transition.
12 Q4 output Data output of flip-flop 4.
13 D4 input Data input of flip-flop 4, sampled on the LOW-to-HIGH clock transition.
14 D5 input Data input of flip-flop 5, sampled on the LOW-to-HIGH clock transition.
15 Q5 output Data output of flip-flop 5.
16 VCC power_in Supply voltage; the SN74HC174 is specified for 2.0 V to 6.0 V and the SN74HCT174 for 4.5 V to 5.5 V, with absolute maximum VCC of +7 V.

Key specifications

Parameter Value
Manufacturer lingxingic
Package DIP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 7
Supply current ICC 50 mA 7
Ground current IGND -50 mA 7
Input clamping current IIK -20 20 mA VI < -0.5V or VI > VCC+0.5V 7
Output clamping current IOK -20 20 mA VO < -0.5V or VO > VCC+0.5V 7
Output current IO -25 25 mA -0.5V < VO < VCC+0.5V 7
Storage temperature Tstg -65 150 ℃ 7
Soldering temperature (DIP) TL 245 ℃ 10s, DIP package 7
Supply voltage (HC) VCC 2 5 6 V 7
Ambient temperature Tamb -40 125 ℃ 7
HIGH-level input voltage VIH 1.5 1.2 V Tamb=-40℃ to +85℃; VCC=2.0V 7
HIGH-level input voltage VIH 3.15 2.4 V Tamb=-40℃ to +85℃; VCC=4.5V 7
HIGH-level input voltage VIH 4.2 3.2 V Tamb=-40℃ to +85℃; VCC=6.0V 7
LOW-level input voltage VIL 0.8 0.5 V Tamb=-40℃ to +85℃; VCC=2.0V 7
LOW-level input voltage VIL 2.1 1.35 V Tamb=-40℃ to +85℃; VCC=4.5V 7
LOW-level input voltage VIL 2.8 1.8 V Tamb=-40℃ to +85℃; VCC=6.0V 7
HIGH-level output voltage VOH 1.9 2 V Tamb=-40℃ to +85℃; VCC=2.0V; IO=-20uA 7
HIGH-level output voltage VOH 4.4 4.5 V Tamb=-40℃ to +85℃; VCC=4.5V; IO=-20uA 7
HIGH-level output voltage VOH 5.9 6 V Tamb=-40℃ to +85℃; VCC=6.0V; IO=-20uA 7
HIGH-level output voltage VOH 3.84 4.32 V Tamb=-40℃ to +85℃; VCC=4.5V; IO=-4.0mA 7
HIGH-level output voltage VOH 5.34 5.81 V Tamb=-40℃ to +85℃; VCC=6.0V; IO=-5.2mA 7
LOW-level output voltage VOL 0 0.1 V Tamb=-40℃ to +85℃; VCC=2.0V; IO=20uA 7
LOW-level output voltage VOL 0 0.1 V Tamb=-40℃ to +85℃; VCC=4.5V; IO=20uA 8
LOW-level output voltage VOL 0.15 0.33 V Tamb=-40℃ to +85℃; VCC=4.5V; IO=4.0mA 8
LOW-level output voltage VOL 0.16 0.33 V Tamb=-40℃ to +85℃; VCC=6.0V; IO=5.2mA 8
Input leakage current II -1 1 uA Tamb=-40℃ to +85℃; VCC=6.0V; VI=VCC or GND 8
Supply current ICC 80 uA Tamb=-40℃ to +85℃; VCC=6.0V; VI=VCC or GND; IO=0A 8
HIGH-level input voltage VIH 1.5 V Tamb=-40℃ to +125℃; VCC=2.0V 8
HIGH-level input voltage VIH 3.15 V Tamb=-40℃ to +125℃; VCC=4.5V 8
HIGH-level input voltage VIH 4.2 V Tamb=-40℃ to +125℃; VCC=6.0V 8
LOW-level input voltage VIL 0.5 V Tamb=-40℃ to +125℃; VCC=2.0V 8
LOW-level input voltage VIL 1.35 V Tamb=-40℃ to +125℃; VCC=4.5V 8
LOW-level input voltage VIL 1.8 V Tamb=-40℃ to +125℃; VCC=6.0V 8
HIGH-level output voltage VOH 1.9 V Tamb=-40℃ to +125℃; VCC=2.0V; IO=-20uA 8
HIGH-level output voltage VOH 4.4 V Tamb=-40℃ to +125℃; VCC=4.5V; IO=-20uA 8
HIGH-level output voltage VOH 5.9 V Tamb=-40℃ to +125℃; VCC=6.0V; IO=-20uA 8
HIGH-level output voltage VOH 3.7 V Tamb=-40℃ to +125℃; VCC=4.5V; IO=-4.0mA 8
HIGH-level output voltage VOH 5.2 V Tamb=-40℃ to +125℃; VCC=6.0V; IO=-5.2mA 8
LOW-level output voltage VOL 0.1 V Tamb=-40℃ to +125℃; VCC=2.0V; IO=20uA 8
LOW-level output voltage VOL 0.4 V Tamb=-40℃ to +125℃; VCC=4.5V; IO=4.0mA 8
Supply current ICC 160 uA Tamb=-40℃ to +125℃; VCC=6.0V; VI=VCC or GND; IO=0A 8
CP to Qn propagation delay tPLH, tPHL 20 41 ns Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF; see Figure 4 9
CP to Qn propagation delay tPLH, tPHL 55 205 ns Tamb=-40℃ to +85℃; VCC=2.0V; CL=50pF; see Figure 4 9
MR to Qn HIGH to LOW propagation delay tPHL 16 38 ns Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF; see Figure 5 9
Transition time tTHL, tTLH 7 19 ns Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF; see Figure 4 9
CP input HIGH or LOW pulse width tW 20 6 ns Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF; see Figure 4 9
MR input LOW pulse width tW 20 4 ns Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF; see Figure 5 9
MR to CP recovery time trec 5 -4 ns Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF; see Figure 5 9
Dn to CP set-up time tsu 15 2 ns Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF; see Figure 4 9
Dn to CP hold time th 3 -2 ns Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF; see Figure 4 9
Maximum frequency fmax 24 MHZ Tamb=-40℃ to +85℃; VCC=4.5V; CL=50pF 10
CP to Qn propagation delay tPLH, tPHL 50 ns Tamb=-40℃ to +125℃; VCC=4.5V; CL=50pF; see Figure 4 10
MR to Qn HIGH to LOW propagation delay tPHL 45 ns Tamb=-40℃ to +125℃; VCC=4.5V; CL=50pF; see Figure 5 10
Transition time tTHL, tTLH 22 ns Tamb=-40℃ to +125℃; VCC=4.5V; CL=50pF; see Figure 4 10
CP input HIGH or LOW pulse width tW 24 ns Tamb=-40℃ to +125℃; VCC=4.5V; CL=50pF; see Figure 4 10

CAD (KiCad official)

  • Symbol: SN74HC174N
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: DIP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74hc174n-etched.step / sn74hc174n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc174n.step / sn74hc174n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (17 pp, sha256 61678a8b1a0bdf94, retrieved 2026-10-16, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF