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Contents

README

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AD7147ACPZ-1500RL7

Analog Devices · ADCs/DACs - Special Purpose · LFCSP-24(4x4)

AD7147ACPZ-1500RL7 from Analog Devices, in a LFCSP-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CIN6 passive Capacitance sensor input routed through the CDC switch matrix; unused inputs should be connected to BIAS.
2 CIN7 passive Capacitance sensor input routed through the CDC switch matrix; unused inputs should be connected to BIAS.
3 CIN8 passive Capacitance sensor input routed through the CDC switch matrix; unused inputs should be connected to BIAS.
4 CIN9 passive Capacitance sensor input routed through the CDC switch matrix; unused inputs should be connected to BIAS.
5 CIN10 passive Capacitance sensor input routed through the CDC switch matrix; unused inputs should be connected to BIAS.
6 CIN11 passive Capacitance sensor input routed through the CDC switch matrix; unused inputs should be connected to BIAS.
7 CIN12 passive Capacitance sensor input routed through the CDC switch matrix; unused inputs should be connected to BIAS.
8 ACSHIELD output CDC active shield output (250 kHz oscillating, 0 to VCC) that should be connected to an external shield or plane; maximum load 150 pF.
9 BIAS passive Bias node for internal circuitry that requires a 100 nF capacitor to ground.
10 GND power_in Ground reference point for all circuitry.
11 VCC power_in Supply voltage, specified at 2.6 V to 3.6 V.
12 VDRIVE power_in Serial interface operating voltage supply, specified from 1.65 V to 3.6 V and no higher than VCC.
13 SDA bidirectional I2C serial data input/output that requires a pull-up resistor.
14 ADD0 input I2C address bit 0 that sets the device address.
15 SCLK input Clock input for the serial interface.
16 ADD1 input I2C address bit 1 that sets the device address.
17 INT output General-purpose open-drain interrupt output with programmable polarity that requires a pull-up resistor.
18 GPIO bidirectional Programmable general-purpose input/output pin.
19 CIN0 passive Capacitance sensor input routed through the CDC switch matrix; unused inputs should be connected to BIAS.
20 CIN1 passive Capacitance sensor input routed through the CDC switch matrix; unused inputs should be connected to BIAS.
21 CIN2 passive Capacitance sensor input routed through the CDC switch matrix; unused inputs should be connected to BIAS.
22 CIN3 passive Capacitance sensor input routed through the CDC switch matrix; unused inputs should be connected to BIAS.
23 CIN4 passive Capacitance sensor input routed through the CDC switch matrix; unused inputs should be connected to BIAS.
24 CIN5 passive Capacitance sensor input routed through the CDC switch matrix; unused inputs should be connected to BIAS.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package LFCSP-24(4x4)
Category Data Acquisition
Pins 25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
I2C clock frequency fSCLK 400 kHz I2C timing, TA −40°C to +85°C, VDRIVE 1.65 V to 3.6 V, VCC 2.6 V to 3.6 V (Table 5 note: guaranteed by design, not production tested) 7
Start condition hold time tHD; STA 0.6 μs I2C timing, Table 5 test conditions 7
Clock low period tLOW 1.3 μs I2C timing, Table 5 test conditions 7
Clock high period tHIGH 0.6 μs I2C timing, Table 5 test conditions 7
Data setup time tSU; DAT 100 ns I2C timing, Table 5 test conditions 7
Data hold time tHD; DAT 300 ns I2C timing, Table 5 test conditions 7
Stop condition setup time tSU; STO 0.6 μs I2C timing, Table 5 test conditions 7
Start condition setup time tSU; STA 0.6 μs I2C timing, Table 5 test conditions 7
Bus-free time between stop and start conditions tBUF 1.3 μs I2C timing, Table 5 test conditions 7
Clock/data rise time tR 300 ns I2C timing, Table 5 test conditions 7
Clock/data fall time tF 300 ns I2C timing, Table 5 test conditions 7
VCC to GND VCC -0.3 3.6 V Absolute maximum rating, supply to ground 8
Input current to any pin except supplies 10 mA Transient currents up to 100 mA do not cause SCR latch-up (footnote 1) 8
ESD rating, human body model 2.5 kV Human body model 8
Operating temperature range -40 105 °C Absolute maximum rating range as printed 8
Storage temperature range -65 150 °C Absolute maximum rating range as printed 8
Junction temperature 150 °C Absolute maximum rating 8
Power dissipation 450 mW LFCSP package 8
Lead temperature (soldering 10 sec) 300 °C Soldering 10 sec 8
IR reflow peak temperature 260 °C Printed as 260°C (±0.5°C) 8
Thermal impedance, junction to ambient θJA 135.7 °C/W LFCSP package 8
Supply voltage VCC VCC 2.6 3.6 V Operating conditions stated for Table 5 timing (VCC = 2.6 V to 3.6 V) 7
Serial interface supply VDRIVE VDRIVE 1.65 3.6 V Operating conditions stated for Table 5 timing (VDRIVE = 1.65 V to 3.6 V) 7
Operating temperature range -40 85 °C Ordering guide temperature range for AD7147ACPZ-1500RL7 70

CAD (KiCad official)

  • Symbol: AD7147ACPZ-1500RL7
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: LFCSP-24(4x4) (KiCad packages3D, STEP)
  • 3D model files: ad7147acpz-1500rl7-etched.step / ad7147acpz-1500rl7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad7147acpz-1500rl7.step / ad7147acpz-1500rl7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (70 pp, sha256 eb238e959528fe23, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF