component
TPSI3050SQDWZRQ1
Public Made by Adomby adom
Texas Instruments Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownTPSI3050SQDWZRQ1
Texas Instruments · Gate Drivers · SOIC-8
TPSI3050SQDWZRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Active high driver enable; the input range is 0 to 48 V in two-wire mode and 0 to 5.5 V in three-wire mode (absolute maximum 60 V), with EN rise and fall rates of up to 65 V/ms in two-wire mode. |
| 2 | PXFR | input | Selects one of seven power-transfer levels through an external resistor to VSSP, with a recommended power-transfer control range of 0 to 5.5 V and an absolute maximum of 60 V. |
| 3 | VDDP | power_in | Primary side supply, 3.0 to 5.5 V in three-wire mode (absolute maximum 6 V with respect to VSSP), decoupled to VSSP with 0.22 to 20 µF in three-wire mode. |
| 4 | VSSP | power_in | Ground supply for the primary side; primary-side voltage limits are referenced to this pin. |
| 5 | VSSS | power_in | Ground supply for the secondary side; secondary-side voltage limits are referenced to this pin. |
| 6 | VDDM | power_out | Generated mid supply on the secondary side, absolute maximum 6 V with respect to VSSS, with 0.003 to 40 µF decoupling to VSSS. |
| 7 | VDDH | power_out | Generated high supply on the secondary side, absolute maximum 12 V with respect to VSSS and 6 V between VDDH and VDDM, with 0.003 to 40 µF decoupling across VDDH and VDDM. |
| 8 | VDRV | output | Active high driver output that gate-drives the external power switch, with a nominal 10 V gate drive and 1.5 A peak source / 3 A peak sink, absolute maximum 12 V with respect to VSSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPSI3050SQDWZRQ1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tpsi3050sqdwzrq1-etched.step/tpsi3050sqdwzrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tpsi3050sqdwzrq1.step/tpsi3050sqdwzrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (42 pp, sha256
b5a23c997554bf6e, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).