component
STR731FV2T6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTR731FV2T6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)
STR731FV2T6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P0.0/OCMPB2 | bidirectional | Port 0.0 I/O with TTL input level and 2 mA drive; alternate function is TIM2 output compare B output. |
| 2 | P0.1/OCMPA2 | bidirectional | Port 0.1 I/O with TTL input level and 2 mA drive; alternate function is TIM2 output compare A output. |
| 3 | P0.2/ICAPA2 | bidirectional | Port 0.2 I/O with TTL input level and 2 mA drive; alternate function is TIM2 input capture A input. |
| 4 | P0.3/ICAPB2 | bidirectional | Port 0.3 I/O with TTL input level and 2 mA drive; alternate function is TIM2 input capture B input. |
| 5 | P0.4/OCMPA5 | bidirectional | Port 0.4 I/O with TTL input level and 2 mA drive; alternate function is TIM5 output compare A output. |
| 6 | P0.5/OCMPB5 | bidirectional | Port 0.5 I/O with TTL input level and 2 mA drive; alternate function is TIM5 output compare B output. |
| 7 | P0.6/ICAPA5 | bidirectional | Port 0.6 I/O with TTL input level and 2 mA drive; alternate function is TIM5 input capture A input. |
| 8 | VDD | power_in | 5 V supply pin; the external 5 V supply range on VDD-VSS is -0.3 V to 6.0 V absolute maximum. |
| 9 | VSS | power_in | Ground pin; all 5 V power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external 5 V supply. |
| 10 | P0.12/ICAPA3 | bidirectional | Port 0.12 I/O with TTL input level and 2 mA drive; alternate function is TIM3 input capture A input. |
| 11 | P0.13/ICAPB3 | bidirectional | Port 0.13 I/O with TTL input level and 2 mA drive; alternate function is TIM3 input capture B input. |
| 12 | P0.14/OCMPB3 | bidirectional | Port 0.14 I/O with TTL input level and 2 mA drive; alternate function is TIM3 output compare B output. |
| 13 | P0.15/OCMPA3 | bidirectional | Port 0.15 I/O with TTL input level and 2 mA drive; alternate function is TIM3 output compare A output. |
| 14 | P1.0/OCMPA4 | bidirectional | Port 1.0 I/O with TTL input level and 2 mA drive; alternate function is TIM4 output compare A output. |
| 15 | P1.1/OCMPB4 | bidirectional | Port 1.1 I/O with TTL input level and 2 mA drive; alternate function is TIM4 output compare B output. |
| 16 | P1.2/ICAPB4 | bidirectional | Port 1.2 I/O with TTL input level and 2 mA drive; alternate function is TIM4 input capture B input. |
| 17 | P1.3/ICAPA4 | bidirectional | Port 1.3 I/O with TTL input level and 2 mA drive; alternate function is TIM4 input capture A input. |
| 18 | P1.6/OCMPB1 | bidirectional | Port 1.6 I/O with TTL input level and 2 mA drive; alternate function is TIM1 output compare B output. |
| 19 | P1.7/OCMPA1 | bidirectional | Port 1.7 I/O with TTL input level and 2 mA drive; alternate function is TIM1 output compare A output. |
| 20 | INT0/OCMPA0/P1.8 | bidirectional | Port 1.8 I/O with TTL input level, 2 mA drive and external interrupt INT0; alternate function is TIM0 output compare A output. |
| 21 | INT1/OCMPB0/P1.9 | bidirectional | Port 1.9 I/O with TTL input level, 2 mA drive and external interrupt INT1; alternate function is TIM0 output compare B output. |
| 22 | ICAPB0/WUP28/P1.10 | bidirectional | Port 1.10 I/O with TTL input level and 2 mA drive; alternate functions are TIM0 input capture B input and wake-up line WUP28. |
| 23 | ICAPA0/WUP29/P1.11 | bidirectional | Port 1.11 I/O with TTL input level and 2 mA drive; alternate functions are TIM0 input capture A input and wake-up line WUP29. |
| 24 | ICAPA1/WUP30/P1.12 | bidirectional | Port 1.12 I/O with TTL input level and 2 mA drive; alternate functions are TIM1 input capture A input and wake-up line WUP30. |
| 25 | ICAPB1/WUP31/P1.13 | bidirectional | Port 1.13 I/O with TTL input level and 2 mA drive; alternate functions are TIM1 input capture B input and wake-up line WUP31. |
| 26 | WUP12/CAN0RX/P1.14 | bidirectional | Port 1.14 I/O with TTL input level and 2 mA drive; alternate functions are CAN0 receive data input and wake-up line WUP12. |
| 27 | P1.15/CAN0TX | bidirectional | Port 1.15 I/O with TTL input level and 2 mA drive; alternate function is CAN0 transmit data output. |
| 28 | P2.0/PWM0 | bidirectional | Port 2.0 I/O with TTL input level and 2 mA drive; alternate function is PWM0 PWM output. |
| 29 | WUP13/CAN1RX/P2.1 | bidirectional | Port 2.1 I/O with TTL input level and 2 mA drive; alternate functions are CAN1 receive data input and wake-up line WUP13. |
| 30 | P2.2/CAN1TX | bidirectional | Port 2.2 I/O with TTL input level and 2 mA drive; alternate function is CAN1 transmit data output. |
| 31 | P2.3/PWM1 | bidirectional | Port 2.3 I/O with TTL input level and 2 mA drive; alternate function is PWM1 PWM output. |
| 32 | P2.4/PWM2 | bidirectional | Port 2.4 I/O with TTL input level and 2 mA drive; alternate function is PWM2 PWM output. |
| 33 | M0 | input | BOOT mode selection 0 input with TTL input level and internal pull-down. |
| 34 | RSTIN | input | Reset input with CMOS 0.3VDD/0.7VDD input level and internal pull-up. |
| 35 | M1 | input | BOOT mode selection 1 input with TTL input level and internal pull-down. |
| 36 | VDD | power_in | 5 V supply pin; the external 5 V supply range on VDD-VSS is -0.3 V to 6.0 V absolute maximum. |
| 37 | VSS | power_in | Ground pin; all 5 V power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external 5 V supply. |
| 38 | XTAL1 | input | Oscillator amplifier circuit input and internal clock generator input, used with an external 4-8 MHz crystal or ceramic resonator. |
| 39 | XTAL2 | output | Oscillator amplifier circuit output, used with an external 4-8 MHz crystal or ceramic resonator. |
| 40 | VSS | power_in | Ground pin; all 5 V power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external 5 V supply. |
| 41 | CAN2RX/TDO1/P2.8 | bidirectional | Port 2.8 I/O with TTL input level and 2 mA drive; alternate functions are UART1 transmit data output and CAN2 receive data input (TQFP100 only). |
| 42 | WUP14/CAN2TX/RDI1/P2.9 | bidirectional | Port 2.9 I/O with TTL input level and 2 mA drive; alternate functions are UART1 receive data input, CAN2 transmit data output (TQFP100 only) and wake-up line WUP14. |
| 43 | WUP15/SCL0/P2.14 | bidirectional | Port 2.14 I/O with TTL input level and 2 mA drive; alternate functions are I2C0 serial clock and wake-up line WUP15. |
| 44 | P2.15/SDA0 | bidirectional | Port 2.15 I/O with TTL input level and 2 mA drive; alternate function is I2C0 serial data. |
| 45 | TEST | input | Reserved pin with internal pull-down that must be tied to ground. |
| 46 | VBIAS | passive | Internal RC oscillator bias pin; a 1.3 MΩ external resistor has to be connected to this pin when the 32 kHz RC oscillator frequency is used. |
| 47 | VSS | power_in | Ground pin; all 5 V power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external 5 V supply. |
| 48 | VDD | power_in | 5 V supply pin; the external 5 V supply range on VDD-VSS is -0.3 V to 6.0 V absolute maximum. |
| 49 | P3.4/AIN0 | bidirectional | Port 3.4 I/O with TTL input level and 2 mA drive; alternate function is ADC analog input 0 (AIN0 on TQFP100). |
| 50 | P3.5/AIN1 | bidirectional | Port 3.5 I/O with TTL input level and 2 mA drive; alternate function is ADC analog input 1 (AIN1 on TQFP100). |
| 51 | P3.6/AIN2 | bidirectional | Port 3.6 I/O with TTL input level and 2 mA drive; alternate function is ADC analog input 2 (AIN2 on TQFP100). |
| 52 | P3.7/AIN3 | bidirectional | Port 3.7 I/O with TTL input level and 2 mA drive; alternate function is ADC analog input 3 (AIN3 on TQFP100). |
| 53 | VSSA | power_in | Reference ground for the A/D converter, which must be connected to the external 5 V supply ground. |
| 54 | VDDA | power_in | Reference voltage for the A/D converter; VDDA-VSSA absolute maximum is -0.3 V to VDD+0.3 V. |
| 55 | P3.8/AIN4 | bidirectional | Port 3.8 I/O with TTL input level and 2 mA drive; alternate function is ADC analog input 4 (AIN4 on TQFP100). |
| 56 | P3.9/AIN5 | bidirectional | Port 3.9 I/O with TTL input level and 2 mA drive; alternate function is ADC analog input 5 (AIN5 on TQFP100). |
| 57 | P3.10/AIN6 | bidirectional | Port 3.10 I/O with TTL input level and 2 mA drive; alternate function is ADC analog input 6 (AIN6 on TQFP100). |
| 58 | P3.11/AIN7 | bidirectional | Port 3.11 I/O with TTL input level and 2 mA drive; alternate function is ADC analog input 7 (AIN7 on TQFP100). |
| 59 | P3.12/AIN8/INT2 | bidirectional | Port 3.12 I/O with TTL input level, 2 mA drive and external interrupt INT2; alternate function is ADC analog input 8 (AIN8 on TQFP100). |
| 60 | P3.13/AIN9/INT3 | bidirectional | Port 3.13 I/O with TTL input level, 2 mA drive and external interrupt INT3; alternate function is ADC analog input 9 (AIN9 on TQFP100). |
| 61 | P3.14/AIN10/INT4 | bidirectional | Port 3.14 I/O with TTL input level, 2 mA drive and external interrupt INT4; alternate function is ADC analog input 10 (AIN10 on TQFP100). |
| 62 | P3.15/AIN11/INT5 | bidirectional | Port 3.15 I/O with TTL input level, 2 mA drive and external interrupt INT5; alternate function is ADC analog input 11 (AIN11 on TQFP100). |
| 63 | VDD | power_in | 5 V supply pin; the external 5 V supply range on VDD-VSS is -0.3 V to 6.0 V absolute maximum. |
| 64 | VSS | power_in | Ground pin; all 5 V power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external 5 V supply. |
| 65 | JTRST | input | JTAG reset input with TTL input level and internal pull-up. |
| 66 | JTDI | input | JTAG data input with TTL input level and internal pull-up. |
| 67 | JTMS | input | JTAG mode selection input with TTL input level and internal pull-up. |
| 68 | JTCK | input | JTAG clock input with TTL input level and internal pull-down. |
| 69 | JTDO | output | JTAG data output with 4 mA drive; reset state is high impedance (HiZ). |
| 70 | VSS | power_in | Ground pin; all 5 V power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external 5 V supply. |
| 71 | VDD | power_in | 5 V supply pin; the external 5 V supply range on VDD-VSS is -0.3 V to 6.0 V absolute maximum. |
| 72 | P4.6/SCL1/WUP19 | bidirectional | Port 4.6 I/O with TTL input level and 2 mA drive; alternate functions are I2C1 serial clock and wake-up line WUP19. |
| 73 | P4.7/SDA1 | bidirectional | Port 4.7 I/O with TTL input level and 2 mA drive; alternate function is I2C1 serial data. |
| 74 | P4.10/ICAPB5/WUP20 | bidirectional | Port 4.10 I/O with TTL input level and 2 mA drive; alternate functions are TIM5 input capture B input (TQFP100 only) and wake-up line WUP20. |
| 75 | P4.14/SS1 | bidirectional | Port 4.14 I/O with TTL input level and 2 mA drive; alternate function is BSPI1 slave select. |
| 76 | P4.15/SCK1/WUP22 | bidirectional | Port 4.15 I/O with TTL input level and 2 mA drive; alternate functions are BSPI1 serial clock and wake-up line WUP22. |
| 77 | P5.0/MOSI1 | bidirectional | Port 5.0 I/O with TTL input level and 2 mA drive; alternate function is BSPI1 master output/slave input. |
| 78 | P5.1/MISO1 | bidirectional | Port 5.1 I/O with TTL input level and 2 mA drive; alternate function is BSPI1 master input/slave output. |
| 79 | P5.4/SS2/PWM3 | bidirectional | Port 5.4 I/O with TTL input level and 2 mA drive; alternate functions are BSPI2 slave select and PWM3 PWM output (TQFP100 only). |
| 80 | P5.5/SCK2/WUP23 | bidirectional | Port 5.5 I/O with TTL input level and 2 mA drive; alternate functions are BSPI2 serial clock and wake-up line WUP23. |
| 81 | P5.6/MOSI2 | bidirectional | Port 5.6 I/O with TTL input level and 2 mA drive; alternate function is BSPI2 master output/slave input. |
| 82 | P5.7/MISO2 | bidirectional | Port 5.7 I/O with TTL input level and 2 mA drive; alternate function is BSPI2 master input/slave output. |
| 83 | P5.8/PWM4/INT6 | bidirectional | Port 5.8 I/O with TTL input level, 2 mA drive and external interrupt INT6; alternate function is PWM4 PWM output (TQFP100 only). |
| 84 | P5.9/PWM5/INT7 | bidirectional | Port 5.9 I/O with TTL input level, 2 mA drive and external interrupt INT7; alternate function is PWM5 PWM output (TQFP100 only). |
| 85 | P5.10/RDI2/INT8 | bidirectional | Port 5.10 I/O with TTL input level, 2 mA drive and external interrupt INT8; alternate function is UART2 receive data input. |
| 86 | P5.11/TDO2/INT9 | bidirectional | Port 5.11 I/O with TTL input level, 2 mA drive and external interrupt INT9; alternate function is UART2 transmit data output. |
| 87 | P5.12/INT10 | bidirectional | Port 5.12 I/O with TTL input level, 2 mA drive and external interrupt INT10. |
| 88 | V18 | power_in | 1.8 V core decoupling pin; a 100 nF decoupling capacitor (recommended value) must be connected between this pin and the nearest VSS pin. |
| 89 | VSS | power_in | Ground pin; all 5 V power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external 5 V supply. |
| 90 | VDD | power_in | 5 V supply pin; the external 5 V supply range on VDD-VSS is -0.3 V to 6.0 V absolute maximum. |
| 91 | P6.0/WUP0 | bidirectional | Port 6.0 I/O with TTL input level and 8 mA drive; alternate function is wake-up line WUP0. |
| 92 | RDI3/WUP2/P6.2 | bidirectional | Port 6.2 I/O with TTL input level and 2 mA drive; alternate functions are UART3 receive data input and wake-up line WUP2. |
| 93 | TDO3/WUP4/P6.4 | bidirectional | Port 6.4 I/O with TTL input level and 2 mA drive; alternate functions are UART3 transmit data output and wake-up line WUP4. |
| 94 | P6.6/WUP6 | bidirectional | Port 6.6 I/O with TTL input level and 2 mA drive; alternate function is wake-up line WUP6. |
| 95 | RDI0/WUP10/P6.8 | bidirectional | Port 6.8 I/O with TTL input level and 2 mA drive; alternate functions are UART0 receive data input and wake-up line WUP10. |
| 96 | P6.9/TDO0 | bidirectional | Port 6.9 I/O with TTL input level and 2 mA drive; alternate function is UART0 transmit data output. |
| 97 | P6.11/MISO0 | bidirectional | Port 6.11 I/O with TTL input level and 2 mA drive; alternate function is BSPI0 master input/slave output. |
| 98 | P6.12/MOSI0 | bidirectional | Port 6.12 I/O with TTL input level and 2 mA drive; alternate function is BSPI0 master output/slave input. |
| 99 | SCK0/WUP11/P6.13 | bidirectional | Port 6.13 I/O with TTL input level and 2 mA drive; alternate functions are BSPI0 serial clock and wake-up line WUP11. |
| 100 | P6.14/SS0 | bidirectional | Port 6.14 I/O with TTL input level and 2 mA drive; alternate function is BSPI0 slave select. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |
CAD (KiCad official)
- Symbol:
STR731FV2T6 - Footprint:
Package_QFP:LQFP-100_14x14mm_P0.5mm - 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files:
str731fv2t6-etched.step/str731fv2t6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);str731fv2t6.step/str731fv2t6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (52 pp, sha256
72e523d3e8430aa3, retrieved 2026-10-11, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).