DP83848JSQ from Texas Instruments, in a WQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	IOVDD33	power_in	I/O 3.3 V supply.
2	TX_CLK	output	MII Transmit Clock: 25 MHz output in 100 Mb/s or 2.5 MHz in 10 Mb/s mode, derived from the 25 MHz reference clock. Unused in RMII mode (X1 is the 50 MHz reference).
3	TX_EN	input	MII/RMII Transmit Enable: active-high input indicating presence of valid data on TXD[3:0] (MII) or TXD[1:0] (RMII). Internal pulldown.
4	TXD_0	input	MII/RMII Transmit Data bit 0. Data synchronous to TX_CLK (MII) or the 50 MHz X1 reference (RMII).
5	TXD_1	input	MII/RMII Transmit Data bit 1.
6	TXD_2	input	MII Transmit Data bit 2. Unused in RMII mode.
7	TXD_3	input	MII Transmit Data bit 3. Unused in RMII mode. Internal pulldown.
8	RESERVED	unconnected	Reserved - must be left unconnected.
9	RESERVED	unconnected	Reserved - must be left unconnected.
10	RESERVED	unconnected	Reserved - must be left unconnected.
11	RD-	bidirectional	Differential receive input (PMD Input Pair, negative). Auto-configures to 100BASE-TX or 10BASE-T. In Auto-MDIX mode this pair can be reassigned as the Transmit Output pair. Requires 3.3 V bias.
12	RD+	bidirectional	Differential receive input (PMD Input Pair, positive). Auto-MDIX may swap this pair with TD±. Requires 3.3 V bias.
13	AGND	power_in	Analog ground.
14	TD-	bidirectional	Differential common driver transmit output (PMD Output Pair, negative). Auto-configures to 10BASE-T/100BASE-TX. In Auto-MDIX mode may serve as the Receive Input pair. Requires 3.3 V bias.
15	TD+	bidirectional	Differential common driver transmit output (PMD Output Pair, positive). Auto-MDIX may swap with RD±. Requires 3.3 V bias.
16	PFBIN1	power_in	Power Feedback Input. Fed from PFBOUT via a 0.1 µF decoupling capacitor. Do NOT supply power from any source other than PFBOUT.
17	AGND	power_in	Analog ground.
18	AVDD33	power_in	Analog 3.3 V supply.
19	PFBOUT	power_out	Power Feedback Output. Requires parallel decoupling caps (10 µF tantalum preferred + 0.1 µF) placed close to the pin. Connects to PFBIN1 (pin 16) and PFBIN2 (pin 30).
20	RBIAS	passive	Bias Resistor Connection. Requires a 4.87 kΩ 1% resistor to GND.
21	LED_SPEED/AN1	bidirectional	Speed LED indicator (ON at 100 Mb/s, OFF at 10 Mb/s) muxed with AN1 auto-negotiation advertisement strap. AN1/AN0 straps set the advertised operating mode; use a 2.2 kΩ pullup/pulldown to override the internal pullup default. Internal weak pullup.
22	LED_LINK/AN0	bidirectional	Link LED (Mode 1) or Link/Activity LED (Mode 2) muxed with AN0 auto-negotiation advertisement strap. Selects advertised speed/duplex per the AN[1:0] strap table. Internal weak pullup.
23	RESET_N	input	Active-low reset input. Assert low for at least 1 µs to force a full reset; all internal registers re-initialize to defaults defined in the Register Block section, and all strap options are re-sampled. Internal pullup.
24	MDIO	bidirectional	Management Data I/O: bi-directional MII management data signal sourced by either the station management entity or the PHY. Requires an external 1.5 kΩ pullup resistor.
25	MDC	input	Management Data Clock: synchronous clock for MDIO. May be asynchronous to TX/RX clocks. 25 MHz maximum, no minimum clock rate.
26	IOVDD33	power_in	I/O 3.3 V supply.
27	X2	output	Crystal Output: connect to an external 25 MHz crystal resonator across X1/X2. Leave unconnected if an external CMOS oscillator source is used on X1.
28	X1	input	Crystal/Oscillator Input: primary clock reference. Connect a 25 MHz ±50 ppm crystal (across X1/X2) or a CMOS-level oscillator to X1 only. In RMII mode X1 must be driven by a 50 MHz ±50 ppm CMOS oscillator.
29	DGND	power_in	Digital ground.
30	PFBIN2	power_in	Power Feedback Input. Fed from PFBOUT via a 0.1 µF decoupling capacitor. Do NOT supply power from any source other than PFBOUT.
31	RX_CLK	output	MII Receive Clock: 25 MHz recovered receive clock in 100 Mb/s mode or 2.5 MHz in 10 Mb/s mode. Unused in RMII mode (X1 acts as the 50 MHz reference).
32	RX_DV/MII_MODE	bidirectional	MII Receive Data Valid output muxed with the MII_MODE strap. Strap default (no pullup) selects MII; strapping high (2.2 kΩ pullup) selects RMII mode. Internal pulldown, so default is MII.
33	CRS/CRS_DV/LED_CFG	bidirectional	MII Carrier Sense (CRS) in MII mode, or combined Carrier Sense + Receive Data Valid (CRS_DV) in RMII mode; also LED_CFG strap that selects LED mode (default Mode 1, strap for Mode 2). Internal weak pullup.
34	RX_ER/MDIX_EN	bidirectional	MII/RMII Receive Error output muxed with MDIX_EN strap. Default (internal pullup) enables Auto-MDIX; an external pulldown disables Auto-MDIX. Not required to be used by a MAC (the PHY corrupts data on receive errors).
35	COL/PHYAD0	bidirectional	MII Collision Detect output (RMII: recovered from CRS_DV) muxed with PHYAD0 strap bit. PHY address strap value (default 1) latched into PHYCTRL at reset; PHYAD=0 puts the PHY into MII Isolate Mode. Internal pullup.
36	RXD_0/PHYAD1	bidirectional	MII/RMII Receive Data bit 0 (RXD[0] valid when RX_DV asserted) muxed with PHYAD1 strap bit. Internal pulldown (PHYAD[4:1]).
37	RXD_1/PHYAD2	bidirectional	MII/RMII Receive Data bit 1 muxed with PHYAD2 strap bit. Internal pulldown.
38	RXD_2/PHYAD3	bidirectional	MII Receive Data bit 2 (unused in RMII mode) muxed with PHYAD3 strap bit. Internal pulldown.
39	RXD_3/PHYAD4	bidirectional	MII Receive Data bit 3 (unused in RMII mode) muxed with PHYAD4 strap bit. Internal pulldown.
40	IOGND	power_in	I/O ground.
41	DAP	power_in	Die Attach Pad (exposed thermal pad) on the underside of the WQFN-40 package. Connect to ground plane for proper thermal dissipation and grounding.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	WQFN-40-EP(6x6)
Category	Interface
Pins	41

Ordering variants

Same part, different packaging or reel option.

DP83848JSQ
DP83848JSQX
DP83848JSQHSQ
DP83848JSQMSQ
DP83848JSQTSQ

CAD (KiCad official)

Symbol: DP83848JSQ
Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
3D model: WQFN-40-EP(6x6) (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`dp83848jsq.step`	538 KB	You want the bare part, or you mark your own boards.
`dp83848jsq-etched.step`	3.4 MB	You want the part with `DP83848JSQ` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 818 faces against 314 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (87 pp, sha256 e9f526e34aad33d9, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF