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STM32H563VIT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32H563VIT6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)
STM32H563VIT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TRACECLK, SAI1_CK1, SPI4_SCK, OCTOSPI1_IO2, ETH_MII_TXD3, FMC_A23 and DCMI_D3/PSSI_D3. |
| 2 | PE3 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TRACED0, TIM15_BKIN, SAI1_SD_B, USART10_TX and FMC_A19; additional function TAMP_IN6/TAMP_OUT3. |
| 3 | PE4 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TRACED1, SAI1_D2, TIM15_CH1N, SPI4_NSS, FMC_A20 and DCMI_D4/PSSI_D4; additional function TAMP_IN7/TAMP_OUT8. |
| 4 | PE5 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TRACED2, SAI1_CK2, TIM15_CH1, SPI4_MISO, FMC_A21 and DCMI_D6/PSSI_D6; additional function TAMP_IN8/TAMP_OUT7. |
| 5 | PE6 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TRACED3, TIM1_BKIN2, SAI1_D1, TIM15_CH2, SPI4_MOSI, SAI2_MCLK_B and FMC_A22; additional function TAMP_IN3/TAMP_OUT6. |
| 6 | VBAT | power_in | Backup-domain supply for the RTC and 32 backup registers; absolute maximum range is -0.3 V to 4.0 V relative to VSS. |
| 7 | PC13 | bidirectional | 5 V-tolerant FT_t I/O supplied through the power switch (VSW); output speed must not exceed 2 MHz with a 30 pF load and it must not be used as a current source; functional as tamper input/output in VBAT and Standby; additional functions TAMP_IN1/TAMP_OUT2, RTC_OUT1/RTC_TS and WKUP4. |
| 8 | PC14-OSC32_IN | bidirectional | 5 V-tolerant FT I/O supplied through the power switch with the same 2 MHz / 30 pF output limit as PC13; also the LSE oscillator input (OSC32_IN). |
| 9 | PC15-OSC32_OUT | bidirectional | 5 V-tolerant FT I/O supplied through the power switch with the same 2 MHz / 30 pF output limit as PC13; also the LSE oscillator output (OSC32_OUT). |
| 10 | VSS | power_in | Ground pin of the digital domain; all VSS pins must be connected to ground. |
| 11 | VDD | power_in | Main digital and I/O supply; standard operating range is 1.71 V to 3.6 V (HSLV=0) or 1.71 V to 2.7 V (HSLV=1), absolute maximum -0.3 V to 4.0 V. |
| 12 | PH0-OSC_IN | bidirectional | 5 V-tolerant FT I/O; also the HSE oscillator input (OSC_IN) for 4-50 MHz external clock or crystal. |
| 13 | PH1-OSC_OUT | bidirectional | 5 V-tolerant FT I/O; also the HSE oscillator output (OSC_OUT). |
| 14 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor. |
| 15 | PC0 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function supplied by VDDA; alternate functions include TIM16_BKIN, SAI1_MCLK_A, SPI2_RDY, FMC_A25 and OCTOSPI1_IO7; additional function ADC12_INP10. |
| 16 | PC1 | bidirectional | 5 V-tolerant FT_ah I/O with analog switch supplied by VDDA; alternate functions include TRACED0, SAI1_SD_A, SPI2_MOSI/I2S2_SDO, SDMMC2_CK and ETH_MDC; additional functions ADC12_INP11/ADC12_INN10, TAMP_IN3/TAMP_OUT5 and WKUP6. |
| 17 | PC2 | bidirectional | 5 V-tolerant FT_a I/O with analog switch supplied by VDDA; alternate functions include PWR_CSLEEP, TIM17_CH1, SPI2_MISO/I2S2_SDI, OCTOSPI1_IO5, ETH_MII_TXD2 and FMC_SDNE0; additional functions ADC12_INP12/ADC12_INN11. |
| 18 | PC3 | bidirectional | 5 V-tolerant FT_a I/O with analog switch supplied by VDDA; alternate functions include PWR_CSTOP, SAI1_D3, LPTIM3_CH1, SPI2_MOSI/I2S2_SDO, OCTOSPI1_IO6 and FMC_SDCKE0; additional functions ADC12_INP13/ADC12_INN12. |
| 19 | VSSA | power_in | Analog ground for ADC, DAC and the analog reference blocks. |
| 20 | VREF- | power_in | Negative voltage reference pin listed as a supply pin in the pin table; the datasheet gives no further limits for this pin in the pinout section. |
| 21 | VREF+ | power_in | Positive voltage reference input for the ADC/DAC, rated within the -0.3 V to 4.0 V external supply range; when the VREF+ pad is absent the internal VREFBUF must stay disabled (VREF+ is present on this package). |
| 22 | VDDA | power_in | Analog supply for ADC, DAC, reference and analog switches; absolute maximum -0.3 V to 4.0 V relative to VSS. |
| 23 | PA0 | bidirectional | 5 V-tolerant FT_at I/O with analog switch supplied by VDDA; alternate functions include TIM2_CH1, TIM5_CH1, TIM8_ETR, SPI6_NSS, USART2_CTS/USART2_NSS and UART4_TX; additional functions ADC12_INP0/ADC12_INN1, TAMP_IN2/TAMP_OUT1 and WKUP1. |
| 24 | PA1 | bidirectional | 5 V-tolerant FT_aht I/O with analog switch supplied by VDDA; alternate functions include TIM2_CH2, TIM5_CH2, LPTIM1_IN1, OCTOSPI1_DQS, USART2_RTS and UART4_RX; additional functions ADC12_INP1 and TAMP_IN5/TAMP_OUT4. |
| 25 | PA2 | bidirectional | 5 V-tolerant FT_hat I/O with analog switch supplied by VDDA; alternate functions include TIM2_CH3, TIM5_CH3, TIM15_CH1, LPTIM1_IN2, USART2_TX and ETH_MDIO; additional functions ADC12_INP14, TAMP_IN4/TAMP_OUT3 and WKUP2. |
| 26 | PA3 | bidirectional | 5 V-tolerant FT_ah I/O with analog switch supplied by VDDA; alternate functions include TIM2_CH4, TIM5_CH4, OCTOSPI1_CLK, TIM15_CH2, SPI2_NSS/I2S2_WS and USART2_RX; additional function ADC12_INP15. |
| 27 | VSS | power_in | Ground pin of the digital domain; all VSS pins must be connected to ground. |
| 28 | VDD | power_in | Main digital and I/O supply; standard operating range is 1.71 V to 3.6 V (HSLV=0), absolute maximum -0.3 V to 4.0 V. |
| 29 | PA4 | bidirectional | 3.6 V-tolerant TT_a I/O with analog switch supplied by VDDA; alternate functions include TIM5_ETR, LPTIM2_CH1, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK and DCMI_HSYNC/PSSI_DE; additional functions ADC12_INP18 and DAC1_OUT1. |
| 30 | PA5 | bidirectional | 3.6 V-tolerant TT_ah I/O with analog switch supplied by VDDA; alternate functions include TIM2_CH1, TIM8_CH1N, SPI1_SCK/I2S1_CK, SPI6_SCK, ETH_MII_TX_EN and PSSI_D14; additional functions ADC12_INP19/ADC12_INN18 and DAC1_OUT2. |
| 31 | PA6 | bidirectional | 5 V-tolerant FT_ah I/O with analog switch supplied by VDDA; alternate functions include TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO/I2S1_SDI, OCTOSPI1_IO3, USART11_TX and DCMI_PIXCLK/PSSI_PDCK; additional function ADC12_INP3. |
| 32 | PA7 | bidirectional | 5 V-tolerant FT_ah I/O with analog switch supplied by VDDA; alternate functions include TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI/I2S1_SDO, USART11_RX, OCTOSPI1_IO2, ETH_MII_RX_DV and FMC_NWE; additional functions ADC12_INP7/ADC12_INN3. |
| 33 | PC4 | bidirectional | 5 V-tolerant FT_a I/O with analog switch supplied by VDDA; alternate functions include TIM2_CH4, SAI1_CK1, LPTIM2_ETR, I2S1_MCK, USART3_RX, ETH_MII_RXD0 and FMC_SDNE0; additional function ADC12_INP4. |
| 34 | PC5 | bidirectional | 5 V-tolerant FT_ah I/O with analog switch supplied by VDDA; alternate functions include TIM1_CH4N, SAI1_D3, PSSI_D15, SAI1_FS_A, UART12_RTS, OCTOSPI1_DQS, ETH_MII_RXD1 and FMC_SDCKE0; additional functions ADC12_INP8/ADC12_INN4. |
| 35 | PB0 | bidirectional | 5 V-tolerant FT_ah I/O with analog switch supplied by VDDA; alternate functions include TIM1_CH2N, TIM3_CH3, TIM8_CH2N, OCTOSPI1_IO1, USART11_CK, UART4_CTS, ETH_MII_RXD2 and LPTIM3_CH1; additional functions ADC12_INP9/ADC12_INN5. |
| 36 | PB1 | bidirectional | 5 V-tolerant FT_ah I/O with analog switch supplied by VDDA; alternate functions include TIM1_CH3N, TIM3_CH4, TIM8_CH3N, OCTOSPI1_IO0, ETH_MII_RXD3 and LPTIM3_CH2; additional function ADC12_INP5. |
| 37 | PB2 | bidirectional | 5 V-tolerant FT_ah I/O with analog switch supplied by VDDA; alternate functions include RTC_OUT2, SAI1_D1, TIM8_CH4N, SPI1_RDY, LPTIM1_CH1, SPI3_MOSI/I2S3_SDO, OCTOSPI1_CLK and SDMMC1_CMD; also LSCO output. |
| 38 | PE7 | bidirectional | 5 V-tolerant FT_ah I/O with analog switch supplied by VDDA; alternate functions include TIM1_ETR, UART12_RTS, UART7_RX, OCTOSPI1_IO4 and FMC_D4/FMC_AD4. |
| 39 | PE8 | bidirectional | 5 V-tolerant FT_ah I/O with analog switch supplied by VDDA; alternate functions include TIM1_CH1N, UART12_CTS/UART12_NSS, UART7_TX, OCTOSPI1_IO5 and FMC_D5/FMC_AD5. |
| 40 | PE9 | bidirectional | 5 V-tolerant FT_ah I/O with analog switch supplied by VDDA; alternate functions include TIM1_CH1, UART12_RX, UART7_RTS, OCTOSPI1_IO6 and FMC_D6/FMC_AD6. |
| 41 | PE10 | bidirectional | 5 V-tolerant FT_ah I/O with analog switch supplied by VDDA; alternate functions include TIM1_CH2N, UART12_TX, UART7_CTS, OCTOSPI1_IO7 and FMC_D7/FMC_AD7. |
| 42 | PE11 | bidirectional | 5 V-tolerant FT_ah I/O with analog switch supplied by VDDA; alternate functions include TIM1_CH2, SPI1_RDY, SPI4_NSS, OCTOSPI1_NCS, SAI2_SD_B and FMC_D8/FMC_AD8. |
| 43 | PE12 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TIM1_CH3N, SPI4_SCK, SAI2_SCK_B and FMC_D9/FMC_AD9. |
| 44 | PE13 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TIM1_CH3, SPI4_MISO, SAI2_FS_B and FMC_D10/FMC_AD10. |
| 45 | PE14 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TIM1_CH4, SPI4_MOSI, SAI2_MCLK_B and FMC_D11/FMC_AD11. |
| 46 | PE15 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TIM1_BKIN, TIM1_CH4N, USART10_CK and FMC_D12/FMC_AD12. |
| 47 | PB10 | bidirectional | 5 V-tolerant FT_f I/O with Fm+ capability; alternate functions include TIM2_CH3, LPTIM3_CH1, LPTIM2_IN1, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX, OCTOSPI1_NCS and ETH_MII_RX_ER. |
| 48 | VCAP | power_in | Core-logic regulator (VCORE) output pin that must be decoupled with the external VCAP capacitor. |
| 49 | VSS | power_in | Ground pin of the digital domain; all VSS pins must be connected to ground. |
| 50 | VDD | power_in | Main digital and I/O supply; standard operating range is 1.71 V to 3.6 V (HSLV=0), absolute maximum -0.3 V to 4.0 V. |
| 51 | PB12 | bidirectional | 5 V-tolerant FT_fh I/O with Fm+ and high-speed low-voltage options; alternate functions include TIM1_BKIN, OCTOSPI1_NCLK, I2C2_SDA, SPI2_NSS/I2S2_WS, UCPD1_FRSTX, USART3_CK, FDCAN2_RX and UART5_RX. |
| 52 | PB13 | bidirectional | 5 V-tolerant FT_c I/O with USB Type-C power delivery function; alternate functions include TIM1_CH1N, LPTIM3_IN1, LPTIM2_CH1, I2C2_SMBA, SPI2_SCK/I2S2_CK, USART3_CTS/USART3_NSS, FDCAN2_TX and SDMMC1_D0; additional function UCPD1_CC1. |
| 53 | PB14 | bidirectional | 5 V-tolerant FT_c I/O with USB Type-C power delivery function; alternate functions include TIM1_CH2N, TIM12_CH1, TIM8_CH2N, USART1_TX, SPI2_MISO/I2S2_SDI, USART3_RTS, UART4_RTS and SDMMC2_D0; additional function UCPD1_CC2. |
| 54 | PB15 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include RTC_REFIN, TIM1_CH3N, TIM12_CH2, USART1_RX, SPI2_MOSI/I2S2_SDO, UART4_CTS, SDMMC2_D1, OCTOSPI1_CLK and UART5_RX; additional function PVD_IN. |
| 55 | PD8 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include USART3_TX and FMC_D13/FMC_AD13. |
| 56 | PD9 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include USART3_RX, FDCAN2_RX and FMC_D14/FMC_AD14. |
| 57 | PD10 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include LPTIM2_CH2, USART3_CK and FMC_D15/FMC_AD15. |
| 58 | PD11 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include SAI1_CK1, LPTIM2_IN2, I2C4_SMBA, USART3_CTS/USART3_NSS, UART4_RX, OCTOSPI1_IO0 and FMC_A16/FMC_CLE. |
| 59 | PD12 | bidirectional | 5 V-tolerant FT_fh I/O with Fm+ and high-speed low-voltage options; alternate functions include LPTIM1_IN1, TIM4_CH1, LPTIM2_IN1, I2C4_SCL, I3C1_SCL, USART3_RTS, UART4_TX, OCTOSPI1_IO1 and FMC_A17/FMC_ALE. |
| 60 | PD13 | bidirectional | 5 V-tolerant FT_fh I/O with Fm+ and high-speed low-voltage options; alternate functions include LPTIM1_CH1, TIM4_CH2, LPTIM2_CH1, I2C4_SDA, I3C1_SDA, OCTOSPI1_IO3, UART9_RTS and FMC_A18. |
| 61 | PD14 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TIM4_CH3, UART8_CTS, UART9_RX and FMC_D0/FMC_AD0. |
| 62 | PD15 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TIM4_CH4, UART8_RTS, UART9_TX and FMC_D1/FMC_AD1. |
| 63 | PC6 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TIM3_CH1, TIM8_CH1, I2S2_MCK, SAI1_SCK_A, USART6_TX, FMC_NWAIT, OCTOSPI1_IO5 and DCMI_D0/PSSI_D0. |
| 64 | PC7 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TRGIO, TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, FMC_NE1, OCTOSPI1_IO6 and DCMI_D1/PSSI_D1. |
| 65 | PC8 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TRACED1, TIM3_CH3, TIM8_CH3, USART6_CK, UART5_RTS, FMC_NE2/FMC_NCE, FMC_INT and DCMI_D2/PSSI_D2. |
| 66 | PC9 | bidirectional | 5 V-tolerant FT_fh I/O with Fm+ and high-speed low-voltage options; alternate functions include MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, AUDIOCLK, UART5_CTS, OCTOSPI1_IO0 and FMC_CLE; additional function UCPD1_DB2. |
| 67 | PA8 | bidirectional | 5 V-tolerant FT_fh I/O with Fm+ and high-speed low-voltage options; alternate functions include MCO1, TIM1_CH1, TIM8_BKIN2, I2C3_SCL, SPI1_RDY, USART1_CK, USB_SOF, UART7_RX and FMC_NOE. |
| 68 | PA9 | bidirectional | 5 V-tolerant FT_d I/O with USB Type-C dead battery function; alternate functions include TIM1_CH2, LPUART1_TX, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX, ETH_MII_TX_ER and FMC_NWE; additional function UCPD1_DB1. |
| 69 | PA10 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TIM1_CH3, LPUART1_RX, LPTIM2_IN2, UCPD1_FRSTX, USART1_RX, FDCAN2_TX and SDMMC1_D0. |
| 70 | PA11 | bidirectional | 5 V-tolerant FT_u I/O supplied by VDDUSB for the USB function; alternate functions include TIM1_CH4, LPUART1_CTS, SPI2_NSS/I2S2_WS, UART4_RX, USART1_CTS/USART1_NSS, FDCAN1_RX and USB_DM. |
| 71 | PA12 | bidirectional | 5 V-tolerant FT_u I/O supplied by VDDUSB for the USB function; alternate functions include TIM1_ETR, LPUART1_RTS, SPI2_SCK/I2S2_CK, UART4_TX, USART1_RTS, SAI2_FS_B, FDCAN1_TX and USB_DP. |
| 72 | PA13 | bidirectional | 5 V-tolerant FT I/O; after reset it is the JTMS/SWDIO debug function with an internal pull-up enabled. |
| 73 | VDDUSB | power_in | Supply for the USB full-speed I/O (USB FS IOs). |
| 74 | VSS | power_in | Ground pin of the digital domain; all VSS pins must be connected to ground. |
| 75 | VDD | power_in | Main digital and I/O supply; standard operating range is 1.71 V to 3.6 V (HSLV=0), absolute maximum -0.3 V to 4.0 V. |
| 76 | PA14 | bidirectional | 5 V-tolerant FT I/O; after reset it is the JTCK/SWCLK debug function with an internal pull-down enabled. |
| 77 | PA15 | bidirectional | 5 V-tolerant FT I/O; after reset it is the JTDI debug function with an internal pull-up enabled; alternate functions include TIM2_CH1, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, UART4_RTS and UART7_TX. |
| 78 | PC10 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include LPTIM3_ETR, SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, OCTOSPI1_IO1, ETH_MII_TXD0, SDMMC1_D2 and DCMI_D8/PSSI_D8. |
| 79 | PC11 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include LPTIM3_IN1, SPI3_MISO/I2S3_SDI, USART3_RX, UART4_RX, OCTOSPI1_NCS, SDMMC1_D3 and DCMI_D4/PSSI_D4. |
| 80 | PC12 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TRACED3, TIM15_CH1, SPI6_SCK, SPI3_MOSI/I2S3_SDO, USART3_CK, UART5_TX, SDMMC1_CK and DCMI_D9/PSSI_D9. |
| 81 | PD0 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TIM8_CH4N, UART4_RX, FDCAN1_RX, UART9_CTS and FMC_D2/FMC_AD2. |
| 82 | PD1 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include UART4_TX, FDCAN1_TX and FMC_D3/FMC_AD3. |
| 83 | PD2 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TRACED2, TIM3_ETR, TIM15_BKIN, UART5_RX, SDMMC1_CMD, DCMI_D11/PSSI_D11 and LPTIM4_ETR; additional function WKUP7. |
| 84 | PD3 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include SPI2_SCK/I2S2_CK, USART2_CTS/USART2_NSS, FMC_CLK and DCMI_D5/PSSI_D5; additional function WKUP8. |
| 85 | PD4 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include USART2_RTS, OCTOSPI1_IO4 and FMC_NOE. |
| 86 | PD5 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TIM1_CH4N, SPI2_RDY, USART2_TX, FDCAN1_TX, OCTOSPI1_IO5 and FMC_NWE. |
| 87 | PD6 | bidirectional | 5 V-tolerant FT_sh I/O whose supply is listed as VDDIO2 only; alternate functions include SAI1_D1, SPI3_MOSI/I2S3_SDO, SAI1_SD_A, USART2_RX, OCTOSPI1_IO6, SDMMC2_CK, FMC_NWAIT and DCMI_D10/PSSI_D10. |
| 88 | PD7 | bidirectional | 5 V-tolerant FT_sh I/O whose supply is listed as VDDIO2 only; alternate functions include SPI1_MOSI/I2S1_SDO, USART2_CK, OCTOSPI1_IO7, SDMMC2_CMD, FMC_NE1/FMC_NCE and LPTIM4_OUT. |
| 89 | PB3 | bidirectional | 5 V-tolerant FT_fh I/O with Fm+ and high-speed low-voltage options; alternate functions include JTDO/TRACESWO, TIM2_CH2, I2C2_SDA, SPI1_SCK/I2S1_CK, SPI3_SCK/I2S3_CK, SPI6_SCK, SDMMC2_D2 and UART7_RX; after reset it is the JTDO/TRACESWO debug function. |
| 90 | PB4 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; after reset it is the NJTRST debug function with an internal pull-up enabled; alternate functions include TIM16_BKIN, TIM3_CH1, OCTOSPI1_CLK, LPTIM1_CH2, SPI1_MISO/I2S1_SDI, SPI6_MISO and UART7_TX. |
| 91 | PB5 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include TIM17_BKIN, TIM3_CH2, OCTOSPI1_NCLK, I2C1_SMBA, SPI1_MOSI/I2S1_SDO, SPI6_MOSI, FDCAN2_RX, ETH_PPS_OUT, FMC_SDCKE1 and DCMI_D10/PSSI_D10. |
| 92 | PB6 | bidirectional | 5 V-tolerant FT_f I/O with Fm+ capability; alternate functions include TIM16_CH1N, TIM4_CH1, I3C1_SCL, I2C1_SCL, HDMI_CEC, I2C4_SCL, USART1_TX, LPUART1_TX, FDCAN2_TX, OCTOSPI1_NCS and FMC_SDNE1. |
| 93 | PB7 | bidirectional | 5 V-tolerant FT_fa I/O with Fm+ capability and analog switch supplied by VDDA; alternate functions include TIM17_CH1N, TIM4_CH2, I3C1_SDA, I2C1_SDA, I2C4_SDA, USART1_RX, LPUART1_RX, FDCAN1_TX and FMC_NL; additional function WKUP5. |
| 94 | BOOT0 | input | Boot-mode selection input; its input voltage is limited to VSS to min(min(VDD, VDDA, VDDUSB, VDDIO2)+4.0 V, 6.0 V) per the voltage characteristics, and boot modes are defined in the boot mode tables (Table 3/Table 4). |
| 95 | PB8 | bidirectional | 5 V-tolerant FT_fh I/O with Fm+ and high-speed low-voltage options; alternate functions include TIM16_CH1, TIM4_CH3, I3C1_SCL, I2C1_SCL, SPI4_RDY, I2C4_SCL, SDMMC1_CKIN, UART4_RX, FDCAN1_RX and DCMI_D6/PSSI_D6. |
| 96 | PB9 | bidirectional | 5 V-tolerant FT_fh I/O with Fm+ and high-speed low-voltage options; alternate functions include TIM17_CH1, TIM4_CH4, I3C1_SDA, I2C1_SDA, SPI2_NSS/I2S2_WS, I2C4_SDA, UART4_TX, FDCAN1_TX and DCMI_D7/PSSI_D7. |
| 97 | PE0 | bidirectional | 5 V-tolerant FT_h I/O with high-speed low-voltage option; alternate functions include LPTIM1_ETR, TIM4_ETR, LPTIM2_CH2, LPTIM2_ETR, SPI3_RDY, UART8_RX, FDCAN1_RX, FMC_NBL0 and DCMI_D2/PSSI_D2. |
| 98 | VCAP | power_in | Core-logic regulator (VCORE) output pin that must be decoupled with the external VCAP capacitor. |
| 99 | VSS | power_in | Ground pin of the digital domain; all VSS pins must be connected to ground. |
| 100 | VDD | power_in | Main digital and I/O supply; standard operating range is 1.71 V to 3.6 V (HSLV=0), absolute maximum -0.3 V to 4.0 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |
CAD (KiCad official)
- Symbol:
STM32H563VIT6 - Footprint:
Package_QFP:LQFP-100_14x14mm_P0.5mm - 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files:
stm32h563vit6-etched.step/stm32h563vit6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32h563vit6.step/stm32h563vit6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (275 pp, sha256
5bbb35bcb33c55f6, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).