component
TDNM1230UX
Public Made by Adomby adom
Shenzhen JingYang MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTDNM1230UX
Shenzhen JingYang · MOSFETs · SOP-8
TDNM1230UX from Shenzhen JingYang, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of MOSFET 1 (N-channel); VDSS 30V, ID 10A continuous at TA=25°C. |
| 2 | G1 | input | Gate of MOSFET 1; VGSS ±20V, threshold 1.2V to 2.5V. |
| 3 | S2 | passive | Source of MOSFET 2 (N-channel); VDSS 30V, ID 10A continuous at TA=25°C. |
| 4 | G2 | input | Gate of MOSFET 2; VGSS ±20V, threshold 1.2V to 2.5V. |
| 5 | D2 | passive | Drain of MOSFET 2, shorted with pin 6; RDS(on) max 12mΩ at VGS=10V, ID=8A. |
| 6 | D2 | passive | Drain of MOSFET 2, shorted with pin 5; RDS(on) max 12mΩ at VGS=10V, ID=8A. |
| 7 | D1 | passive | Drain of MOSFET 1, shorted with pin 8; RDS(on) max 12mΩ at VGS=10V, ID=8A. |
| 8 | D1 | passive | Drain of MOSFET 1, shorted with pin 7; RDS(on) max 12mΩ at VGS=10V, ID=8A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen JingYang |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | 30 | V | 2 | |||
| Gate Source Voltage | VGSS | -20 | 20 | V | 2 | ||
| Drain Current (Continuous) | ID | 10 | A | TA=25°C | 2 | ||
| Drain Current (Continuous) | ID | 8 | A | TA=100°C | 2 | ||
| Drain Current (Pulse) | IDM | 36 | A | 2 | |||
| Power Dissipation | PD | 1.5 | W | TA=25°C | 2 | ||
| Power Dissipation | PD | 1 | W | TA=100°C | 2 | ||
| Operating Temperature / Storage Temperature | TJ/TSTG | -55 | 150 | °C | 2 | ||
| Single Pulse Avalanche Energy | EAS | 24.2 | mJ | 2 | |||
| Thermal Resistance, Junction-to-Ambient | RθJA | 85 | °C/W | 2 | |||
| Drain-Source Breakdown Voltage | V(BR)DSS | 30 | V | VGS=0V, ID=250uA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | uA | VDS=24V, VGS=0V | 2 | ||
| Gate Threshold Voltage | VGS(TH) | 1.2 | 2.5 | V | VDS=VGS, IDS=250uA | 2 | |
| Gate Leakage Current | IGSS | -100 | 100 | nA | VGS=±20V, VDS=0V | 2 | |
| Drain-Source On-state Resistance | RDS(on) | 12 | mΩ | VGS=10V, ID=8A | 2 | ||
| Drain-Source On-state Resistance | RDS(on) | 18 | mΩ | VGS=4.5V, ID=6A | 2 | ||
| Diode Forward Voltage | VSD | 1 | V | ISD=1A, VGS=0V | 2 |
CAD (KiCad official)
- Symbol:
TDNM1230UX - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
tdnm1230ux-etched.step/tdnm1230ux-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tdnm1230ux.step/tdnm1230ux.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shenzhen JingYang datasheet (4 pp, sha256
196873cd6f794362, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).