component
MC74HC165ADR2G
Public Unreviewedby Ray
onsemi Shifting Register, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownMC74HC165ADR2G
onsemi · Shifting Register · SOIC-16
MC74HC165ADR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SH/~LD | input | Serial Shift / Parallel Load control. When low, the eight parallel inputs (A-H) are asynchronously loaded into the register. When high, data shifts serially on the rising clock edge. |
| 2 | CLOCK | input | Clock input. Data is shifted on the rising edge when SH/~LD is high and Clock Inhibit is low. Combined with Clock Inhibit through an internal NOR. |
| 3 | E | input | Parallel data input E (bit 4). Loaded into the register when SH/~LD is low. |
| 4 | F | input | Parallel data input F (bit 5). Loaded into the register when SH/~LD is low. |
| 5 | G | input | Parallel data input G (bit 6). Loaded into the register when SH/~LD is low. |
| 6 | H | input | Parallel data input H (bit 7, last stage). Loaded when SH/~LD is low. Its state appears at QH after load. |
| 7 | ~QH | output | Complementary serial data output of the last (H) stage. Inverse of QH. |
| 8 | GND | power_in | Ground reference (0 V). |
| 9 | QH | output | Serial data output of the last (H) stage. Follows the H flip-flop. |
| 10 | SA | input | Serial data input into the A (first) stage. Shifted in on rising clock edge when SH/~LD is high. |
| 11 | A | input | Parallel data input A (bit 0, first stage). Loaded when SH/~LD is low. |
| 12 | B | input | Parallel data input B (bit 1). Loaded when SH/~LD is low. |
| 13 | C | input | Parallel data input C (bit 2). Loaded when SH/~LD is low. |
| 14 | D | input | Parallel data input D (bit 3). Loaded when SH/~LD is low. |
| 15 | CLOCK_INHIBIT | input | Clock inhibit. Active-high; when high, clocking is disabled (register holds). The two clock sources (CLOCK and CLOCK INHIBIT) are combined via an internal 2-input NOR so either may serve as clock while the other acts as inhibit. |
| 16 | VCC | power_in | Positive supply, 2.0 V to 6.0 V. Bypass with a 100 nF ceramic to GND close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
Ordering variants
Same part, different packaging or reel option.
MC74HC165ADR2GMC74HC165ADR2GDGMC74HC165ADR2GNMC74HC165ADR2GNGMC74HC165ADR2GDTMC74HC165ADR2GDTGMC74HC165ADR2GDTR2GMC74HC165ADR2GMNMC74HC165ADR2GMNG
CAD (KiCad official)
- Symbol:
MC74HC165ADR2G - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
mc74hc165adr2g.step |
217 KB | You want the bare part, or you mark your own boards. |
mc74hc165adr2g-etched.step |
3.0 MB | You want the part with MC74HC165ADR2G already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 744 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (12 pp, sha256
9cdfdaa6f1619128, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).