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AT90USB646-MU

Public Made by Adom

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Microchip Tech Pre-ordered MCUs, QFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersat90usb646-mufactory-2.0.0extractor-text

Verified AT90USB646-MU

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 65 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AT90USB646-MU · QFN-64-EP(9x9) · 65 pins
  • ✓copper: 65 copper pads, none touching another net
  • ✓datasheet: all 65 pin names found in the 39-page datasheet
  • ✓distributor: lcsc C1338078, digikey AT90USB646-MU-ND, mouser 556-AT90USB646-MU
  • ✓family: QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-cco3tvqd/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): the datasheet dimensions give no height or body size to compare (datasheet p.18)
  • ✓pads: 65 pins = 65 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 65 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ at90usb646-mu.kicad_sym✓ at90usb646-mu.kicad_mod✓ at90usb646-mu.step
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3D Model

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Symbol & Footprint

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Contents

README

markdown

AT90USB646-MU

Microchip Tech · Pre-ordered MCUs · QFN-64-EP(9x9)

AT90USB646-MU from Microchip Tech, in a QFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE6 bidirectional Port E bit 6, 8-bit bidirectional I/O with internal pull-up, alternate functions INT.6 and AIN.0.
2 PE7 bidirectional Port E bit 7, bidirectional I/O with internal pull-up, alternate functions INT.7, AIN.1 and UVcon.
3 UVCC power_in USB pads internal regulator input supply voltage.
4 D- bidirectional USB full/low speed negative data line, to be connected to the USB D- connector pin through a serial 22 ohm resistor.
5 D+ bidirectional USB full/low speed positive data line, to be connected to the USB D+ connector pin through a serial 22 ohm resistor.
6 UGND power_in USB pads ground.
7 UCAP power_out USB pads internal regulator output supply voltage, to be connected to an external 1 uF capacitor.
8 VBUS power_in USB VBUS monitor and OTG negotiations.
9 PE3 bidirectional Port E bit 3, bidirectional I/O with internal pull-up, alternate function IUID.
10 PB0 bidirectional Port B bit 0, bidirectional I/O with internal pull-up, alternate functions SS and PCINT0.
11 PB1 bidirectional Port B bit 1, bidirectional I/O with internal pull-up, alternate functions PCINT1 and SCLK.
12 PB2 bidirectional Port B bit 2, bidirectional I/O with internal pull-up, alternate functions PDI, PCINT2 and MOSI.
13 PB3 bidirectional Port B bit 3, bidirectional I/O with internal pull-up, alternate functions PDO, PCINT3 and MISO.
14 PB4 bidirectional Port B bit 4, bidirectional I/O with internal pull-up, alternate functions PCINT4 and OC.2A.
15 PB5 bidirectional Port B bit 5, bidirectional I/O with internal pull-up, alternate functions PCINT5 and OC.1A.
16 PB6 bidirectional Port B bit 6, bidirectional I/O with internal pull-up, alternate functions PCINT6 and OC.1B.
17 PB7 bidirectional Port B bit 7, bidirectional I/O with internal pull-up, alternate functions PCINT7, OC.0A and OC.1C.
18 PE4 bidirectional Port E bit 4, bidirectional I/O with internal pull-up, alternate functions INT4 and TOSC1.
19 PE5 bidirectional Port E bit 5, bidirectional I/O with internal pull-up, alternate functions INT.5 and TOSC2.
20 RESET input Reset input; a low level longer than the minimum pulse length generates a reset even if the clock is not running.
21 VCC power_in Digital supply voltage.
22 GND power_in Ground.
23 XTAL2 output Output from the inverting oscillator amplifier.
24 XTAL1 input Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
25 PD0 bidirectional Port D bit 0, bidirectional I/O with internal pull-up, alternate functions OC0B, SCL and INT0.
26 PD1 bidirectional Port D bit 1, bidirectional I/O with internal pull-up, alternate functions OC2B, SDA and INT1.
27 PD2 bidirectional Port D bit 2, bidirectional I/O with internal pull-up, alternate functions RXD1 and INT2.
28 PD3 bidirectional Port D bit 3, bidirectional I/O with internal pull-up, alternate functions TXD1 and INT3.
29 PD4 bidirectional Port D bit 4, bidirectional I/O with internal pull-up, alternate function ICP1.
30 PD5 bidirectional Port D bit 5, bidirectional I/O with internal pull-up, alternate function XCK1.
31 PD6 bidirectional Port D bit 6, bidirectional I/O with internal pull-up, alternate function T1.
32 PD7 bidirectional Port D bit 7, bidirectional I/O with internal pull-up, alternate function T0.
33 PE0 bidirectional Port E bit 0, bidirectional I/O with internal pull-up, alternate function WR.
34 PE1 bidirectional Port E bit 1, bidirectional I/O with internal pull-up, alternate function RD.
35 PC0 bidirectional Port C bit 0, bidirectional I/O with internal pull-up, alternate function A8.
36 PC1 bidirectional Port C bit 1, bidirectional I/O with internal pull-up, alternate function A9.
37 PC2 bidirectional Port C bit 2, bidirectional I/O with internal pull-up, alternate function A10.
38 PC3 bidirectional Port C bit 3, bidirectional I/O with internal pull-up, alternate functions A11 and T.3.
39 PC4 bidirectional Port C bit 4, bidirectional I/O with internal pull-up, alternate functions A12 and OC.3C.
40 PC5 bidirectional Port C bit 5, bidirectional I/O with internal pull-up, alternate functions A13 and OC.3B.
41 PC6 bidirectional Port C bit 6, bidirectional I/O with internal pull-up, alternate functions A14 and OC.3A.
42 PC7 bidirectional Port C bit 7, bidirectional I/O with internal pull-up, alternate functions A15, IC.3 and CLKO.
43 PE2 bidirectional Port E bit 2, bidirectional I/O with internal pull-up, alternate functions ALE and HWB.
44 PA7 bidirectional Port A bit 7, bidirectional I/O with internal pull-up, alternate function AD7.
45 PA6 bidirectional Port A bit 6, bidirectional I/O with internal pull-up, alternate function AD6.
46 PA5 bidirectional Port A bit 5, bidirectional I/O with internal pull-up, alternate function AD5.
47 PA4 bidirectional Port A bit 4, bidirectional I/O with internal pull-up, alternate function AD4.
48 PA3 bidirectional Port A bit 3, bidirectional I/O with internal pull-up, alternate function AD3.
49 PA2 bidirectional Port A bit 2, bidirectional I/O with internal pull-up, alternate function AD2.
50 PA1 bidirectional Port A bit 1, bidirectional I/O with internal pull-up, alternate function AD1.
51 PA0 bidirectional Port A bit 0, bidirectional I/O with internal pull-up, alternate function AD0.
52 VCC power_in Digital supply voltage.
53 GND power_in Ground.
54 PF7 bidirectional Port F bit 7, ADC input ADC7 or I/O, JTAG TDI; pull-up is activated even on reset if JTAG is enabled.
55 PF6 bidirectional Port F bit 6, ADC input ADC6 or I/O, JTAG TDO.
56 PF5 bidirectional Port F bit 5, ADC input ADC5 or I/O, JTAG TMS; pull-up is activated even on reset if JTAG is enabled.
57 PF4 bidirectional Port F bit 4, ADC input ADC4 or I/O, JTAG TCK; pull-up is activated even on reset if JTAG is enabled.
58 PF3 bidirectional Port F bit 3, ADC input ADC3 or I/O when the ADC is not used.
59 PF2 bidirectional Port F bit 2, ADC input ADC2 or I/O when the ADC is not used.
60 PF1 bidirectional Port F bit 1, ADC input ADC1 or I/O when the ADC is not used.
61 PF0 bidirectional Port F bit 0, ADC input ADC0 or I/O when the ADC is not used.
62 AREF input Analog reference pin for the A/D converter.
63 GND power_in Ground.
64 AVCC power_in Analog supply voltage.
65 EP power_in Large center pad internally connected to GND; should be soldered or glued to the board for mechanical stability.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-64-EP(9x9)
Category Embedded Processors & Controllers
Pins 65

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power supply voltage (operating range) 2.7 5.5 V Power supply column of the ordering table, for AT90USB646-MU 18
Maximum CPU speed 16 MHz Speed column of the ordering table; footnote 3 refers to 'Maximum speed vs. VCC' on page 392 18
Industrial operating temperature range -40 85 °C Operating range 'Industrial' in the ordering table 18

CAD (KiCad official)

  • Symbol: AT90USB646-MU
  • Footprint: Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm
  • 3D model: QFN-64-EP(9x9) (KiCad packages3D, STEP)
  • 3D model files: at90usb646-mu-etched.step / at90usb646-mu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); at90usb646-mu.step / at90usb646-mu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (39 pp, sha256 1134cff1fb835efc, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF