component
74HC164AP
Public Made by Adomby adom
Sungine Shift Registers, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74HC164AP
Sungine · Shift Registers · SOP-14
74HC164AP from Sungine, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Serial data input A, ANDed with B; if either A or B is low, new data entry is inhibited and the first flip-flop is set low on the next clock. |
| 2 | B | input | Serial data input B, ANDed with A; when one of A or B is high the other input enables data entry on the rising clock edge. |
| 3 | QA | output | Shift register output A (first stage). |
| 4 | QB | output | Shift register output B. |
| 5 | QC | output | Shift register output C. |
| 6 | QD | output | Shift register output D. |
| 7 | GND | power_in | Ground (0 V) reference; supply current through VCC or GND is limited to ±50 mA. |
| 8 | CLOCK | input | Clock input, data shifts one position on the low-to-high transition; input rise/fall time max 1000 ns at 2.0 V, 500 ns at 4.5 V, 400 ns at 6.0 V. |
| 9 | CLEAR | input | Active-low asynchronous clear input, a low level forces all outputs QA to QH low regardless of other inputs. |
| 10 | QE | output | Shift register output E. |
| 11 | QF | output | Shift register output F. |
| 12 | QG | output | Shift register output G. |
| 13 | QH | output | Shift register output H (last stage); output current limited to ±25 mA. |
| 14 | VCC | power_in | Positive supply voltage, recommended operating range 2 V to 6 V, absolute maximum -0.5 V to +7.0 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Sungine |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 7 | V | 2 | ||
| Clamp diode current | IIK, IOK | -20 | 20 | mA | 2 | ||
| Output current | IOUT | -25 | 25 | mA | 2 | ||
| VCC or ground current | ICC | -50 | 50 | mA | 2 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 2 | ||
| Power dissipation SOP | PD | 500 | mW | SOP | 2 | ||
| Soldering temperature | TL | 260 | °C | 10 s | 2 | ||
| Supply voltage | VCC | 2 | 6 | V | 3 | ||
| Input/output voltage | VIN, VOUT | 0 | 6 | V | 0 ~ VCC | 3 | |
| Operating temperature | TA | -10 | 70 | °C | 3 | ||
| Input rise/fall time (clear input) | Tr,Tf | 1000 | ns | VCC=2.0V | 3 | ||
| Input rise/fall time (clear input) | Tr,Tf | 500 | ns | VCC=4.5V | 3 | ||
| Input rise/fall time (clear input) | Tr,Tf | 400 | ns | VCC=6.0V | 3 | ||
| Min high-level input voltage | VIH | 1.5 | V | VCC=2.0V, Ta=25℃ and -40~85℃ | 3 | ||
| Min high-level input voltage | VIH | 3.15 | V | VCC=4.5V, Ta=25℃ and -40~85℃ | 3 | ||
| Min high-level input voltage | VIH | 4.2 | V | VCC=6.0V, Ta=25℃ and -40~85℃ | 3 | ||
| Max low-level input voltage | VIL | 0.5 | V | VCC=2.0V, Ta=25℃ and -40~85℃ | 3 | ||
| Max low-level input voltage | VIL | 1.35 | V | VCC=4.5V, Ta=25℃ and -40~85℃ | 3 | ||
| Max low-level input voltage | VIL | 1.8 | V | VCC=6.0V, Ta=25℃ and -40~85℃ | 3 | ||
| Min high-level output voltage | VOH | 1.9 | 2 | V | VIN=VIH or VIL, Iout≤20µA, VCC=2.0V, Ta=25℃ | 3 | |
| Min high-level output voltage | VOH | 4.4 | 4.5 | V | VIN=VIH or VIL, Iout≤20µA, VCC=4.5V, Ta=25℃ | 3 | |
| Min high-level output voltage | VOH | 5.9 | 6 | V | VIN=VIH or VIL, Iout≤20µA, VCC=6.0V, Ta=25℃ | 3 | |
| Min high-level output voltage | VOH | 3.98 | 4.2 | V | VIN=VIH or VIL, Iout≤4.0mA, VCC=4.5V, Ta=25℃ | 3 | |
| Min high-level output voltage | VOH | 5.48 | 5.7 | V | VIN=VIH or VIL, Iout≤5.2mA, VCC=6.0V, Ta=25℃ | 3 | |
| Min high-level output voltage | VOH | 3.84 | V | VIN=VIH or VIL, Iout≤4.0mA, VCC=4.5V, Ta=-40~85℃ | 3 | ||
| Min high-level output voltage | VOH | 5.34 | V | VIN=VIH or VIL, Iout≤5.2mA, VCC=6.0V, Ta=-40~85℃ | 3 | ||
| Max low-level output voltage | VOL | 0 | 0.1 | V | VIN=VIH or VIL, Iout≤20µA, VCC=2.0/4.5/6.0V | 3 | |
| Max low-level output voltage | VOL | 0.2 | 0.26 | V | VIN=VIH or VIL, Iout≤4.0mA, VCC=4.5V, Ta=25℃ | 3 | |
| Max low-level output voltage | VOL | 0.33 | V | VIN=VIH or VIL, Iout≤4.0mA/5.2mA, VCC=4.5V/6.0V, Ta=-40~85℃ | 3 | ||
| Max input current | IIN | -0.1 | 0.1 | µA | VIN=VCC or GND, VCC=6.0V, Ta=25℃ | 3 | |
| Max input current | IIN | -1 | 1 | µA | VIN=VCC or GND, VCC=6.0V, Ta=-40~85℃ | 3 | |
| Max quiescent supply current | ICC | 8 | 80 | µA | VIN=VCC or GND, IOUT=0µA, VCC=6.0V | 3 | |
| Max operating frequency | fMAX | 30 | MHz | VCC=5V, TA=25℃, CL=15pF, tr=tf=6ns | 4 | ||
| Max propagation delay clock to output | tPHL, tPLH | 19 | 30 | ns | VCC=5V, TA=25℃, CL=15pF, tr=tf=6ns | 4 | |
| Max propagation delay clear to output | tPHL, tPLH | 23 | 35 | ns | VCC=5V, TA=25℃, CL=15pF, tr=tf=6ns | 4 | |
| Min removal time clear to clock | tREM | -2 | 0 | ns | VCC=5V, TA=25℃, CL=15pF, tr=tf=6ns | 4 | |
| Min setup time data to clock | tS | 12 | 20 | ns | VCC=5V, TA=25℃, CL=15pF, tr=tf=6ns | 4 | |
| Min hold time clock to data | tH | 1 | 5 | ns | VCC=5V, TA=25℃, CL=15pF, tr=tf=6ns | 4 | |
| Min pulse width clear or clock | tW | 10 | 16 | ns | VCC=5V, TA=25℃, CL=15pF, tr=tf=6ns | 4 | |
| Max input rise/fall time | tr, tf | 1000 | ns | VCC=2.0V, CL=50pF | 5 | ||
| Max input rise/fall time | tr, tf | 500 | ns | VCC=4.5V, CL=50pF | 5 | ||
| Max input rise/fall time | tr, tf | 400 | ns | VCC=6.0V, CL=50pF | 5 | ||
| Max input capacitance | CIN | 5 | 10 | PF | 5 | ||
| Power dissipation capacitance | CPD | 150 | PF | VCC=5.0V | 5 |
CAD (KiCad official)
- Symbol:
74HC164AP - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
74hc164ap-etched.step/74hc164ap-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc164ap.step/74hc164ap.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Sungine datasheet (6 pp, sha256
509ce0913a7e6555, retrieved 2026-10-23, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).