component
MAX17502FATB+T
Public Made by Adomby adom
Analog Devices Inc Maxim Integrated DC-DC Converters, TDFN-10(2x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownMAX17502FATB+T
Analog Devices Inc Maxim Integrated · DC-DC Converters · TDFN-10(2x3)
MAX17502FATB+T from Analog Devices Inc Maxim Integrated, in a TDFN-10(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PGND | power_in | Power ground; connect externally to the power ground plane and tie GND and PGND together at the ground return of the VCC bypass capacitor. |
| 2 | VIN | power_in | Power-supply input with a stated input supply range of 4.5V to 60V. |
| 3 | EN/UVLO | input | Enable/undervoltage-lockout input; drive high to enable the output, or divide VIN to GND to set the turn-on input voltage (EN rising threshold 1.194V to 1.236V, falling 1.114V to 1.156V). |
| 4 | VCC | power_out | Internal 5V LDO output that must be bypassed with 1µF ceramic capacitance to GND (VCC output range 4.65V to 5.35V). |
| 5 | FB/VO | input | Feedback input; connect directly to the output on fixed-output versions or to the center of the VOUT-to-GND divider on adjustable versions (FB regulation voltage 0.9V typical). |
| 6 | SS | input | Soft-start input; a capacitor from SS to GND sets the soft-start time (charging current 5µA typical, rated 4.7µA to 5.3µA). |
| 7 | N.C./COMP | passive | External loop compensation: on adjustable MAX17502G/H connect an RC network from COMP to GND; on fixed-output MAX17502E/F it is a no-connect and must be left unconnected. |
| 8 | RESET | output | Open-drain power-good output that is driven low when FB falls below 92.5% of its set value and goes high 1024 clock cycles after FB rises above 95.5%; it requires an external pullup and can sink 2mA while low. |
| 9 | GND | power_in | Analog ground; connect to the exposed pad and to PGND at the VCC bypass capacitor return. |
| 10 | LX | output | Switching node connected to the inductor; it is high impedance when the device is in shutdown mode (LX-to-PGND rating -0.3V to VIN+0.3V). |
| 11 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices Inc Maxim Integrated |
| Package | TDFN-10(2x3) |
| Category | Power Management (PMIC) |
| Pins | 11 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Range | VIN | 4.5 | 60 | V | 2 | ||
| Input Supply Current, shutdown | IIN-SH | 0.9 | 3.5 | µA | VEN = 0V, shutdown mode | 2 | |
| Input Supply Current, normal switching | IIN-SW | 4.75 | 6.75 | mA | Normal switching mode, no load, MAX17502E/F/G | 2 | |
| EN Threshold, rising | VENR | 1.194 | 1.218 | 1.236 | V | VEN rising | 2 |
| EN Threshold, falling | VENF | 1.114 | 1.135 | 1.156 | V | VEN falling | 2 |
| EN Input Leakage Current | IEN | 8 | 200 | nA | VEN = VIN = 60V, TA = +25°C | 2 | |
| VCC Output Voltage Range | VCC | 4.65 | 5 | 5.35 | V | 6V < VIN < 12V, 0mA < IVCC < 10mA, 12V < VIN < 60V, 0mA < IVCC < 2mA | 2 |
| VCC Current Limit | IVCC-MAX | 15 | 40 | 80 | mA | VCC = 4.3V, VIN = 12V | 2 |
| VCC UVLO rising | VCC-UVR | 3.85 | 4 | 4.15 | V | VCC rising | 2 |
| VCC UVLO falling | VCC-UVF | 3.55 | 3.7 | 3.85 | V | VCC falling | 2 |
| VCC Dropout | VCC-DO | 4.1 | V | VIN = 4.5V, IVCC = 5mA | 2 | ||
| High-Side pMOS On-Resistance | RDS-ONH | 0.55 | 0.85 | Ω | ILX = 0.5A (sourcing), TA = +25°C | 3 | |
| High-Side pMOS On-Resistance | RDS-ONH | 1.2 | Ω | ILX = 0.5A (sourcing), TA = TJ = +125°C (Note 3) | 3 | ||
| Low-Side nMOS On-Resistance | RDS-ONL | 0.2 | 0.35 | Ω | ILX = 0.5A (sinking), TA = +25°C | 3 | |
| Low-Side nMOS On-Resistance | RDS-ONL | 0.47 | Ω | ILX = 0.5A (sinking), TA = TJ = +125°C (Note 3) | 3 | ||
| LX Leakage Current | ILX_LKG | 1 | µA | VEN = 0V, TA = +25°C, VLX = (VPGND + 1V) to (VIN - 1V) | 3 | ||
| Soft-Start Charging Current | ISS | 4.7 | 5 | 5.3 | µA | VSS = 0.5V | 3 |
| FB Input Bias Current, MAX17502F | IFB | 6.8 | 12 | 17 | µA | TA = +25°C, VFB = 5V | 3 |
| Output Voltage, MAX17502F | VOUT | 4.922 | 5 | 5.08 | V | MAX17502F | 3 |
| Peak Current-Limit Threshold | IPEAK-LIMIT | 1.4 | 1.65 | 1.9 | A | 4 | |
| Runaway Current-Limit Threshold | IRUNAWAY-LIMIT | 1.45 | 1.7 | 2 | A | 4 | |
| Sink Current-Limit Threshold | ISINK-LIMIT | 0.56 | 0.65 | 0.74 | A | MAX17502E/F/G/H | 4 |
| Switching Frequency, MAX17502E/F/G | fSW | 560 | 600 | 640 | kHz | VFB > VOUT-HICF, MAX17502E/F/G | 4 |
| VOUT Undervoltage Trip Level to Cause Hiccup | VOUT-HICF | 69.14 | 71.14 | 73.14 | % | VSS > 0.95V (soft-start is done) | 4 |
| Minimum On-Time | tON_MIN | 75 | 120 | ns | 4 | ||
| Maximum Duty Cycle, MAX17502E/F/G | DMAX | 92 | 94 | 96 | % | VFB = 0.98 x VFB-REG, MAX17502E/F/G | 4 |
| VOUT Threshold for RESET Falling | VOUT-OKF | 90.5 | 92.5 | 94.5 | % | VFB falling | 4 |
| VOUT Threshold for RESET Rising | VOUT-OKR | 93.5 | 95.5 | 97.5 | % | VFB rising | 4 |
| RESET Output Level Low | VRESET-LOW | 0.02 | V | IRESET = 1mA | 4 | ||
| RESET Output Leakage Current High | IRESET-LKG | 0.45 | µA | VFB = 1.01 x VFB-REG, TA = +25°C | 4 | ||
| EN true shutdown threshold | VEN-TRUESD | 0.7 | V | VEN falling, true shutdown | 2 | ||
| VIN to GND | VIN | -0.3 | 70 | V | 2 | ||
| EN/UVLO to GND | VEN | -0.3 | V | Printed maximum is (VIN + 0.3V) | 2 | ||
| LX to PGND | VLX | -0.3 | V | Printed maximum is (VIN + 0.3V) | 2 | ||
| FB, RESET, COMP, SS to GND | -0.3 | 6 | V | 2 | |||
| VCC to GND | VCC | -0.3 | 6 | V | 2 | ||
| GND to PGND | -0.3 | 0.3 | V | 2 | |||
| LX Total RMS Current | ILX | -1.6 | 1.6 | A | Printed as ±1.6A | 2 | |
| Junction Temperature | TJ | 150 | °C | 2 | |||
| Storage Temperature Range | TSTG | -65 | 160 | °C | 2 | ||
| Lead Temperature (soldering) | 300 | °C | 10s | 2 | |||
| Soldering Temperature (reflow) | 260 | °C | 2 | ||||
| Ambient Operating Temperature Range | TA | -40 | 125 | °C | 1 | ||
| Junction Temperature Operating Range | TJ | -40 | 150 | °C | 1 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | , EP Exposed Pad. Connect to the GND pin of the IC. Connect to a large copper plane below the IC | 9 |
CAD (KiCad official)
- Symbol:
MAX17502FATB+T - Footprint:
Package_DFN_QFN:DFN-10-1EP_2x3mm_P0.5mm_EP0.64x2.4mm - 3D model: TDFN-10(2x3) (KiCad packages3D, STEP)
- 3D model files:
max17502fatb-t-etched.step/max17502fatb-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);max17502fatb-t.step/max17502fatb-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices Inc Maxim Integrated datasheet (21 pp, sha256
0aba253c36f1f7d5, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).