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STM32F101RBT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32F101RBT6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STM32F101RBT6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup-domain supply input for the RTC and backup registers. |
| 2 | PC13-TAMPER-RTC | bidirectional | Standard I/O (not 5 V tolerant) that is powered through the power switch, which sinks only 3 mA, so it must not exceed 2 MHz at 30 pF load and must not be used as a current source. |
| 3 | PC14-OSC32_IN | bidirectional | Standard I/O (not 5 V tolerant) with OSC32_IN function, powered through the power switch with the same limits as PC13 (3 mA, 2 MHz at 30 pF, no current sourcing). |
| 4 | PC15-OSC32_OUT | bidirectional | Standard I/O (not 5 V tolerant) with OSC32_OUT function, powered through the power switch with the same limits as PC13 (3 mA, 2 MHz at 30 pF, no current sourcing). |
| 5 | OSC_IN | input | High-speed external oscillator input (4-16 MHz) configured after reset; PD0 becomes a 5 V tolerant GPIO only when remapped by software, and its output mode is limited to 50 MHz. |
| 6 | OSC_OUT | output | High-speed external oscillator output configured after reset; PD1 becomes a 5 V tolerant GPIO only when remapped by software, and its output mode is limited to 50 MHz. |
| 7 | NRST | bidirectional | Device reset pin; its electrical limits are specified in the NRST pin characteristics section. |
| 8 | PC0 | bidirectional | General-purpose I/O (not 5 V tolerant) that doubles as ADC input channel ADC_IN10. |
| 9 | PC1 | bidirectional | General-purpose I/O (not 5 V tolerant) that doubles as ADC input channel ADC_IN11. |
| 10 | PC2 | bidirectional | General-purpose I/O (not 5 V tolerant) that doubles as ADC input channel ADC_IN12. |
| 11 | PC3 | bidirectional | General-purpose I/O (not 5 V tolerant) that doubles as ADC input channel ADC_IN13. |
| 12 | VSSA | power_in | Analog ground reference for the ADC and analog circuitry. |
| 13 | VDDA | power_in | Analog supply for the ADC; the ADC characteristics specify VDDA from 2.4 V to 3.6 V. |
| 14 | PA0-WKUP | bidirectional | General-purpose I/O (not 5 V tolerant) with WKUP wake-up, USART2_CTS, ADC_IN0 and TIM2_CH1_ETR alternate functions. |
| 15 | PA1 | bidirectional | General-purpose I/O (not 5 V tolerant) with USART2_RTS, ADC_IN1 and TIM2_CH2 alternate functions. |
| 16 | PA2 | bidirectional | General-purpose I/O (not 5 V tolerant) with USART2_TX, ADC_IN2 and TIM2_CH3 alternate functions. |
| 17 | PA3 | bidirectional | General-purpose I/O (not 5 V tolerant) with USART2_RX, ADC_IN3 and TIM2_CH4 alternate functions. |
| 18 | VSS_4 | power_in | Digital ground. |
| 19 | VDD_4 | power_in | Digital supply for I/Os, 2.0 to 3.6 V application supply. |
| 20 | PA4 | bidirectional | General-purpose I/O (not 5 V tolerant) with SPI1_NSS, USART2_CK and ADC_IN4 alternate functions. |
| 21 | PA5 | bidirectional | General-purpose I/O (not 5 V tolerant) with SPI1_SCK and ADC_IN5 alternate functions. |
| 22 | PA6 | bidirectional | General-purpose I/O (not 5 V tolerant) with SPI1_MISO, TIM3_CH1 and ADC_IN6 alternate functions. |
| 23 | PA7 | bidirectional | General-purpose I/O (not 5 V tolerant) with SPI1_MOSI, TIM3_CH2 and ADC_IN7 alternate functions. |
| 24 | PC4 | bidirectional | General-purpose I/O (not 5 V tolerant) that doubles as ADC input channel ADC_IN14. |
| 25 | PC5 | bidirectional | General-purpose I/O (not 5 V tolerant) that doubles as ADC input channel ADC_IN15. |
| 26 | PB0 | bidirectional | General-purpose I/O (not 5 V tolerant) with ADC_IN8 and TIM3_CH3 alternate functions. |
| 27 | PB1 | bidirectional | General-purpose I/O (not 5 V tolerant) with ADC_IN9 and TIM3_CH4 alternate functions. |
| 28 | PB2/BOOT1 | bidirectional | 5 V tolerant general-purpose I/O that shares its function with the BOOT1 boot-mode input. |
| 29 | PB10 | bidirectional | 5 V tolerant general-purpose I/O with I2C2_SCL, USART3_TX and TIM2_CH3 alternate functions. |
| 30 | PB11 | bidirectional | 5 V tolerant general-purpose I/O with I2C2_SDA, USART3_RX and TIM2_CH4 alternate functions. |
| 31 | VSS_1 | power_in | Digital ground. |
| 32 | VDD_1 | power_in | Digital supply for I/Os, 2.0 to 3.6 V application supply. |
| 33 | PB12 | bidirectional | 5 V tolerant general-purpose I/O with SPI2_NSS, I2C2_SMBA and USART3_CK alternate functions. |
| 34 | PB13 | bidirectional | 5 V tolerant general-purpose I/O with SPI2_SCK and USART3_CTS alternate functions. |
| 35 | PB14 | bidirectional | 5 V tolerant general-purpose I/O with SPI2_MISO and USART3_RTS alternate functions. |
| 36 | PB15 | bidirectional | 5 V tolerant general-purpose I/O with SPI2_MOSI alternate function. |
| 37 | PC6 | bidirectional | 5 V tolerant general-purpose I/O with TIM3_CH1 alternate function. |
| 38 | PC7 | bidirectional | 5 V tolerant general-purpose I/O with TIM3_CH2 alternate function. |
| 39 | PC8 | bidirectional | 5 V tolerant general-purpose I/O with TIM3_CH3 alternate function. |
| 40 | PC9 | bidirectional | 5 V tolerant general-purpose I/O with TIM3_CH4 alternate function. |
| 41 | PA8 | bidirectional | 5 V tolerant general-purpose I/O with USART1_CK and MCO alternate functions. |
| 42 | PA9 | bidirectional | 5 V tolerant general-purpose I/O with USART1_TX alternate function. |
| 43 | PA10 | bidirectional | 5 V tolerant general-purpose I/O with USART1_RX alternate function. |
| 44 | PA11 | bidirectional | 5 V tolerant general-purpose I/O with USART1_CTS alternate function. |
| 45 | PA12 | bidirectional | 5 V tolerant general-purpose I/O with USART1_RTS alternate function. |
| 46 | PA13 | bidirectional | 5 V tolerant general-purpose I/O that after reset carries the JTMS-SWDIO debug function. |
| 47 | VSS_2 | power_in | Digital ground. |
| 48 | VDD_2 | power_in | Digital supply for I/Os, 2.0 to 3.6 V application supply. |
| 49 | PA14 | bidirectional | 5 V tolerant general-purpose I/O that after reset carries the JTCK-SWCLK debug function. |
| 50 | PA15 | bidirectional | 5 V tolerant general-purpose I/O with JTDI (debug), TIM2_CH1_ETR and SPI1_NSS alternate functions. |
| 51 | PC10 | bidirectional | 5 V tolerant general-purpose I/O with USART3_TX alternate function. |
| 52 | PC11 | bidirectional | 5 V tolerant general-purpose I/O with USART3_RX alternate function. |
| 53 | PC12 | bidirectional | 5 V tolerant general-purpose I/O with USART3_CK alternate function. |
| 54 | PD2 | bidirectional | 5 V tolerant general-purpose I/O with TIM3_ETR alternate function. |
| 55 | PB3 | bidirectional | 5 V tolerant general-purpose I/O that after reset carries JTDO, with TIM2_CH2, SPI1_SCK and TRACESWO alternate functions. |
| 56 | PB4 | bidirectional | 5 V tolerant general-purpose I/O that after reset carries JNTRST, with TIM3_CH1 and SPI1_MISO alternate functions. |
| 57 | PB5 | bidirectional | General-purpose I/O (not 5 V tolerant) with I2C1_SMBA, TIM3_CH2 and SPI1_MOSI alternate functions. |
| 58 | PB6 | bidirectional | 5 V tolerant general-purpose I/O with I2C1_SCL, TIM4_CH1 and USART1_TX alternate functions. |
| 59 | PB7 | bidirectional | 5 V tolerant general-purpose I/O with I2C1_SDA, TIM4_CH2 and USART1_RX alternate functions. |
| 60 | BOOT0 | input | Boot mode selection input; the device memory map is aliased to Flash or system memory depending on the BOOT pins. |
| 61 | PB8 | bidirectional | 5 V tolerant general-purpose I/O with TIM4_CH3 and I2C1_SCL alternate functions. |
| 62 | PB9 | bidirectional | 5 V tolerant general-purpose I/O with TIM4_CH4 and I2C1_SDA alternate functions. |
| 63 | VSS_3 | power_in | Digital ground. |
| 64 | VDD_3 | power_in | Digital supply for I/Os, 2.0 to 3.6 V application supply. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM32F101RBT6 - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
stm32f101rbt6-etched.step/stm32f101rbt6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f101rbt6.step/stm32f101rbt6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (90 pp, sha256
cf9864b2eb00694d, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).