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NCN5130MNTWG

onsemi · Buffers, Drivers, Receivers, Transceivers · QFN-40-EP(6x6)

NCN5130MNTWG from onsemi, in a QFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VSSA power_in Analog supply voltage ground.
2 VBUS2 power_in Listed as 'Ground for KNX Transmitter' in the pin table (supply type).
3 TXO output KNX transmitter analog output (Type 1, 60 V-rated structure).
4 CCP passive AC coupling external capacitor connection (analog I/O, Type 2).
5 CAV passive Capacitor connection to average bus DC voltage (analog I/O, Type 3).
6 VBUS1 power_in KNX power supply input (Type 5, 60 V-rated structure).
7 CEQ1 passive Capacitor connection 1 for defining the equalization pulse (analog I/O, Type 4).
8 CEQ2 passive Capacitor connection 2 for defining the equalization pulse (analog I/O, Type 4).
9 VFILT passive Filtered bus voltage (supply, Type 5).
10 V20V power_out 20 V supply output from the linear 20 V regulator (Type 5).
11 VDD2MV input Voltage monitor input of Voltage Regulator 2 (analog input, Type 8).
12 VDD2MC input Current monitor input 1 of Voltage Regulator 2 (analog input, Type 9).
13 VDD2 input Current monitor input 2 of Voltage Regulator 2 (analog input, Type 8).
14 VSS2 power_in Voltage Regulator 2 ground.
15 VSW2 output Switch output of Voltage Regulator 2 (analog output, Type 6).
16 VIN power_in Power supply input for Voltage Regulators 1 and 2 (Type 5).
17 VSW1 output Switch output of Voltage Regulator 1 (analog output, Type 6).
18 VSS1 power_in Voltage Regulator 1 ground.
19 VDD1 input Current input 2 and voltage monitor input of Voltage Regulator 1 (analog input, Type 8).
20 VDD1M input Current monitor input 1 of Voltage Regulator 1 (analog input, Type 9).
21 XCLKC input Clock frequency configuration digital input (Type 12).
22 TRIG output Transmission trigger digital output (Type 13).
23 MODE1 input Mode selection input 1 (digital input, Type 12).
24 MODE2 input Mode selection input 2 (digital input, Type 12).
25 TREQ input Transmit request digital input (Type 12).
26 CSB/UC1 bidirectional Chip select output (SPI), configuration input (UART) or 20 V LDO disable (analog mode); Type 13 or 14 depending on MODE1/MODE2.
27 SDI/RXD input Serial data input (SPI) or receive input (UART), digital input Type 14.
28 SDO/TXD output Serial data output (SPI) or transmit output (UART), digital output Type 13.
29 SCK/UC2 bidirectional Serial clock output (SPI), configuration input (UART) or Voltage Regulator 2 disable (analog mode); Type 13 or 14 depending on MODE1/MODE2.
30 VDDD power_in Digital supply voltage input (Type 7).
31 VSSD power_in Digital supply voltage ground.
32 XCLK output Oscillator clock output (digital output, Type 13).
33 XSEL input Clock selection between quartz or digital clock (digital input, Type 12).
34 XTAL2 bidirectional Clock generator output (quartz) or input (digital clock), Type 10 or 14 depending on XSEL.
35 XTAL1 input Clock generator input for quartz (analog input, Type 10).
36 SAVEB output Save signal, open drain with pull-up (digital output, Type 15).
37 RESETB output Reset signal, open drain with pull-up (digital output, Type 15).
38 FANIN input Fan-In analog input (Type 11).
39 ANAOUT output Analog signal output (Type 16).
40 VDDA power_in Analog supply voltage input (Type 7).
41 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer onsemi
Package QFN-40-EP(6x6)
Category Logic
Pins 41

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
KNX Transmitter Output Voltage VTXO -0.3 45 V 5
KNX Transmitter Output Current ITXO 250 mA Note 3: room temperature, shunt resistor for transmitter 5
Voltage on CCP-pin VCCP -10.5 14.5 V 5
Voltage on CAV-pin VCAV -0.3 3.6 V 5
Voltage on VBUS1-pin VBUS1 -0.3 45 V 5
Voltage on ANAOUT pin VANAOUT -0.3 3.6 V 5
Current Consumption VBUS1-pin IBUS1 0 120 mA 5
Voltage on pins CEQ1 and CEQ2 VCEQ -0.3 45 V 5
Voltage on VFILT-pin VFILT -0.3 45 V 5
Voltage on V20V-pin V20V -0.3 25 V 5
Voltage on VDD2MV-pin VDD2MV -0.3 3.6 V 5
Voltage on VDD2MC-pin VDD2MC -0.3 45 V 5
Voltage on VDD2-pin VDD2 -0.3 45 V 5
Voltage on VSW1- and VSW2-pin VSW -0.3 45 V 5
Voltage on VIN-pin VIN -0.3 45 V 5
Voltage on VDD1-pin VDD1 -0.3 3.6 V 5
Voltage on VDD1M-pin VDD1M -0.3 3.6 V 5
Voltage on digital pins MODE1, MODE2, TREQ, CSB/UC1, SDI/TXD, SDO/RXD, SCK/UC2, XCLK, XSEL, SAVEB, RESETB, XCLKC, TRIG, FANIN VDIG -0.3 3.6 V 5
Voltage on VDDD- and VDDA-pin VDD -0.3 3.6 V 5
Voltage on XTAL1- and XTAL2-pin VXTAL -0.3 3.6 V 5
Storage temperature TST -55 150 °C 5
Junction Temperature TJ -40 155 °C Note 4 5
Human Body Model electronic discharge immunity VHBM -2 2 kV Note 5: JEDEC JESD22-A114 5
VBUS1 Voltage VBUS1 20 33 V Note 6: DC value 6
Digital and Analog Supply Voltage (VDDD- and VDDA-pin) VDD 3.13 3.47 V 6
Input Voltage DC-DC Converter 1 and 2 VIN 33 V Note 7; single printed value, placed in Max column (see review_required) 6
Input Voltage at CCP-pin VCCP -10.5 14.5 V 6
Input Voltage at CAV-pin VCAV 0 3.3 V 6
Input Voltage on VDD1-pin VDD1 3.13 3.47 V 6
Input Voltage on VDD1M-pin VDD1M 3.13 3.57 V 6
Input Voltage on VDD2-pin VDD2 1.2 21 V 6
Input Voltage on VDD2MC-pin VDD2MC 1.2 21.1 V 6
Input Voltage on VDD2MV-pin VDD2MV 1.2 V Printed max is symbolic 'VDD'; no number 6
Input Voltage on pins MODE1, MODE2, TREQ, CSB/UC1, SDI/RXD, SCK/UC2, XCLKC, XSEL VDIG 0 V Printed max is symbolic 'VDD'; no number 6
Input Voltage on FANIN-pin VFANIN 0 3.6 V 6
Ambient Temperature TA -40 105 °C 6
Junction Temperature TJ -40 125 °C Note 8: higher junction temperature can reduce lifetime 6
Bus DC voltage VBUS1 20 33 V Excluding active and equalization pulse 7
Bus Current Consumption IBUS1_Int 2 2.7 mA VBUS = 30 V, IBUS = 10 mA, DC2, V20V disabled, no crystal or clock 7
Bus Current Consumption IBUS1_Int 3.5 4.4 mA VBUS = 20 V, IBUS = 40 mA 7
Undervoltage release level VBUSH 17.1 18 18.9 V VBUS1 rising, see Figure 4 7
Undervoltage trigger level VBUSL 15.9 16.8 17.7 V VBUS1 falling, see Figure 4 7
VDDD Digital Power Supply VDDD 3.13 3.3 3.47 V 7
VDDA Analog Power Supply VDDA 3.13 3.3 3.47 V 7
Input Voltage VIN 4.47 33 V Fixed DC-DC converter 8
VDD1 Output Voltage VDD1 3.13 3.3 3.47 V 8
Overcurrent Threshold IDD1_lim -100 -200 mA R2 = 1 , see Figure 13 (Ω glyph missing in extraction) 8
RDS(on) of power switch RDS(on)_p1 8 Ω See Figure 18 8
RDS(on) of flyback switch RDS(on)_n1 4 Ω See Figure 18 8
V20V Output Voltage V20V 18 20 22 V I20V < I20V_lim, VFILT ≥ 21 V 8
V20V Undervoltage release level V20VH 14.2 15 15.8 V V20V rising, see Figure 7 8
V20V Undervoltage trigger level V20VL 13.2 14 14.8 V V20V falling, see Figure 7 8
VFILT Undervoltage release level VFILTH 10.1 10.6 11.2 V VFILT rising, see Figure 5 7
VFILT Undervoltage trigger level VFILTL 8.4 8.9 9.4 V VFILT falling, see Figure 5 7
Logic Low Threshold VIL 0 0.7 V 9
Thermal Warning TTW 105 115 125 °C Rising temperature, see Figure 8 9
Thermal shutdown TTSD 130 140 150 °C Rising temperature, see Figure 8 9
Thermal Resistance Junction-to-Ambient R,ja 30 K/W Simulated conform JEDEC JESD-51, (2S2P) 9
Thermal Resistance Junction-to-Ambient R,ja 60 K/W Simulated conform JEDEC JESD-51, (1S0P) 9
Thermal Resistance Junction-to-Exposed Pad R,jp 0.95 K/W 9

CAD (KiCad official)

  • Symbol: NCN5130MNTWG
  • Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
  • 3D model: QFN-40-EP(6x6) (KiCad packages3D, STEP)
  • 3D model files: ncn5130mntwg-etched.step / ncn5130mntwg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncn5130mntwg.step / ncn5130mntwg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (60 pp, sha256 8c46fc3c9cf044d3, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF