component
XJNG2302
Public Made by Adomby adom
WXNSIC Gate Drivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownXJNG2302
WXNSIC · Gate Drivers · TSSOP-20
XJNG2302 from WXNSIC, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HIN1 | input | Logic input for the high-side gate driver output HO1, compatible with 3.3 V/5 V logic with VIH at least 2.5 V and VIL at most 0.8 V. |
| 2 | HIN2 | input | Logic input for the high-side gate driver output HO2, compatible with 3.3 V/5 V logic with VIH at least 2.5 V and VIL at most 0.8 V. |
| 3 | HIN3 | input | Logic input for the high-side gate driver output HO3, compatible with 3.3 V/5 V logic with VIH at least 2.5 V and VIL at most 0.8 V. |
| 4 | LIN1 | input | Logic input for the low-side gate driver output LO1, compatible with 3.3 V/5 V logic with VIH at least 2.5 V and VIL at most 0.8 V. |
| 5 | LIN2 | input | Logic input for the low-side gate driver output LO2, compatible with 3.3 V/5 V logic with VIH at least 2.5 V and VIL at most 0.8 V. |
| 6 | LIN3 | input | Logic input for the low-side gate driver output LO3, compatible with 3.3 V/5 V logic with VIH at least 2.5 V and VIL at most 0.8 V. |
| 7 | VCC | power_in | Low-side and main power supply, recommended 7 V to 20 V with absolute maximum of -0.3 V to 25 V. |
| 8 | COM | power_in | Ground reference; all absolute voltage parameters are referenced to COM. |
| 9 | LO1 | output | Low-side gate drive output, out of phase with LIN1, swinging between 0 V and VCC. |
| 10 | LO2 | output | Low-side gate drive output, out of phase with LIN2, swinging between 0 V and VCC. |
| 11 | LO3 | output | Low-side gate drive output, out of phase with LIN3, swinging between 0 V and VCC. |
| 12 | VS1 | power_in | High-side floating supply return (bootstrap return) for channel 1, recommended range -9 V to 200 V. |
| 13 | HO1 | output | High-side gate drive output, in phase with HIN1, swinging between VS1 and VB1. |
| 14 | VB1 | power_in | High-side floating supply for channel 1, recommended VS1 + 7 V to VS1 + 20 V with absolute maximum of 225 V. |
| 15 | VS2 | power_in | High-side floating supply return (bootstrap return) for channel 2, recommended range -9 V to 200 V. |
| 16 | HO2 | output | High-side gate drive output, in phase with HIN2, swinging between VS2 and VB2. |
| 17 | VB2 | power_in | High-side floating supply for channel 2, recommended VS2 + 7 V to VS2 + 20 V with absolute maximum of 225 V. |
| 18 | VS3 | power_in | High-side floating supply return (bootstrap return) for channel 3, recommended range -9 V to 200 V. |
| 19 | HO3 | output | High-side gate drive output, in phase with HIN3, swinging between VS3 and VB3. |
| 20 | VB3 | power_in | High-side floating supply for channel 3, recommended VS3 + 7 V to VS3 + 20 V with absolute maximum of 225 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WXNSIC |
| Package | TSSOP-20 |
| Category | Motor Driver ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High side floating supply | VB1,2,3 | -0.3 | 225 | V | 2 | ||
| Low side and main power supply | VCC | -0.3 | 25 | V | 2 | ||
| Low side gate drive output | VLO1,2,3 | -0.3 | V | 2 | |||
| Logic input of HIN & LIN | VIN | -0.3 | V | 2 | |||
| Allowable offset supply voltage transient | dVS/dt | 50 | V/ns | 2 | |||
| Package Power Dissipation | PD | 1.25 | W | TA ≤25°C (TSSOP-20) | 2 | ||
| Junction Temperature | TJ | 150 | °C | 2 | |||
| Storage Temperature | TS | -55 | 150 | °C | 2 | ||
| Lead Temperature (Soldering, 10 seconds) | TL | 300 | °C | Soldering, 10 seconds | 2 | ||
| ESD HBM Model | HBM | 1500 | V | 2 | |||
| ESD CDM Model | CDM | 500 | V | 2 | |||
| Thermal Resistance Junction to Ambient (TSSOP-20) | RthJA | 100 | °C /W | Board mounted, still air | 2 | ||
| High side floating supply return | VS1,2,3 | -9 | 200 | V | 2 | ||
| Low side and main power supply | VCC1,2,3 | 7 | 20 | V | 2 | ||
| Low side gate drive output | VLO1,2,3 | 0 | V | 2 | |||
| Logic input of HIN & LIN | VIN | 0 | V | 2 | |||
| Ambient temperature | TA | -40 | 125 | °C | 2 | ||
| Turn on propagation delay | tON | 150 | 250 | ns | VBIAS (VCC, VBS) = 15V, CL = 1000 pF, TA = 25°C unless otherwise specified | 3 | |
| Turn off propagation delay | tOFF | 120 | 250 | ns | VBIAS (VCC, VBS) = 15V, CL = 1000 pF, TA = 25°C unless otherwise specified | 3 | |
| Delay matching time (tON, tOFF) | MT | 50 | ns | VBIAS (VCC, VBS) = 15V, CL = 1000 pF, TA = 25°C unless otherwise specified | 3 | ||
| Dead time | DT | 100 | 200 | 300 | ns | VBIAS (VCC, VBS) = 15V, CL = 1000 pF, TA = 25°C unless otherwise specified | 3 |
| High level input threshold voltage | VIH | 2.5 | V | VBIAS (VCC, VBS) = 15V, CL = 1000 pF, TA = 25°C unless otherwise specified | 3 | ||
| Low level input threshold voltage | VIL | 0.8 | V | VBIAS (VCC, VBS) = 15V, CL = 1000 pF, TA = 25°C unless otherwise specified | 3 | ||
| VCC supply undervoltage positive going threshold | VCCUV+ | 6.4 | 7 | 7.6 | V | VBIAS (VCC, VBS) = 15V, CL = 1000 pF, TA = 25°C unless otherwise specified | 3 |
| VCC supply undervoltage negative going threshold | VCCUV- | 5.9 | 6.5 | 7.1 | V | VBIAS (VCC, VBS) = 15V, CL = 1000 pF, TA = 25°C unless otherwise specified | 3 |
| VBS supply undervoltage positive going threshold | VBSUV+ | 6.4 | 7.1 | 7.7 | V | VBIAS (VCC, VBS) = 15V, CL = 1000 pF, TA = 25°C unless otherwise specified | 3 |
| VBS supply undervoltage negative going threshold | VBSUV- | 6.2 | 6.9 | 7.5 | V | VBIAS (VCC, VBS) = 15V, CL = 1000 pF, TA = 25°C unless otherwise specified | 3 |
| High-side floating supply leakage current | ILK | 90 | μA | VBIAS (VCC, VBS) = 15V, CL = 1000 pF, TA = 25°C unless otherwise specified | 3 | ||
| Quiescent VBS supply current | IQBS | 70 | 150 | μA | VBIAS (VCC, VBS) = 15V, CL = 1000 pF, TA = 25°C unless otherwise specified | 3 | |
| Quiescent VCC supply current | IQCC | 230 | 350 | μA | VBIAS (VCC, VBS) = 15V, CL = 1000 pF, TA = 25°C unless otherwise specified | 3 | |
| Input bias current (HO/LO = "1") | IIN+ | 25 | 50 | μA | HO/LO = "1"; VBIAS (VCC, VBS) = 15V, CL = 1000 pF, TA = 25°C unless otherwise specified | 3 | |
| Input bias current (HO/LO = "0") | IIN- | 2 | μA | HO/LO = "0"; VBIAS (VCC, VBS) = 15V, CL = 1000 pF, TA = 25°C unless otherwise specified | 3 |
CAD (KiCad official)
- Symbol:
XJNG2302 - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
xjng2302-etched.step/xjng2302-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xjng2302.step/xjng2302.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: WXNSIC datasheet (7 pp, sha256
77bae7c37ca55094, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).